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Showing below up to 106 results in range #51 to #156.
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- Embedded Artificial Intelligence:Systems And Applications
- Embedded Systems and autonomous UAVs
- Enabling Standalone Operation
- Every individual on the planet should have a real chance to obtain personalized medical therapy
- Experimental Validation of Impact Ionization Models for TCAD Simulation by a Novel Characterization Technique
- FFT HDL Code Generator for Multi-Antenna mmWave Communication
- FPGA-Based Digital Frontend for 3G Receivers
- FPGA Optimizations of Dense Binary Hyperdimensional Computing
- Fabian Schuiki
- Fast and Accurate Multiclass Inference for Brain–Computer Interfaces
- Federico Villani
- Ferroelectric Memristors for Artificial Neural Networks (IBM-Zurich)
- Final Presentation
- Final Report
- Frank K. Gürkaynak
- GRAND Hardware Implementation
- Guillaume Mocquard
- Harald Kröll
- Hardware Accelerated Derivative Pricing
- Herschmi
- High resolution, low power Sigma Delta ADC
- Hyperdimensional Computing
- IBM A2O Core
- IBM Research–Zurich
- IP-Based SoC Generation and Configuration (1-3S)
- ISA extensions in the Snitch Processor for Signal Processing (1M)
- IcySoC
- Implementation of Computationally Efficient Scattering Mechanisms for Periodic Devices and 2D Materials
- Implementation of a Heterogeneous System for Image Processing on an FPGA
- Influence of the Initial Filament Geometry on the Forming Step in CBRAM
- Influence of the Initial Filament Geometry on the Forming Step in CBRAM.
- Integrated Devices, Electronics, And Systems
- Integrated silicon photonic structures
- Integrated silicon photonic structures-Lumiphase
- Integrating Hardware Accelerators into Snitch
- Investigation of Metal Diffusion in Oxides for CBRAM Applications
- Investigation of Redox Processes in CBRAM
- Jammer-Resilient Synchronization for Wireless Communications
- Jammer Mitigation Meets Machine Learning
- Karim Badawi
- Libria
- LightProbe
- Low-Power Time Synchronization for IoT Applications
- Low Power Embedded Systems
- Low Power Embedded Systems and Wireless Sensors Networks
- Machine Learning Assisted Direct Synthesis of Passive Networks
- Mapping Networks on Reconfigurable Binary Engine Accelerator
- Marco Bertuletti
- Matheus Cavalcante
- Matteo Perotti
- Matthias Korb
- Mattia
- Mauro Salomon
- MemPool on HERO
- Michael Muehlberghuber
- Michael Rogenmoser
- Mixed-Signal Circuit Design
- Mixed Signal IC Design
- Molecular Binding Kinetics Modelling of NO2 on Graphene/hBN Heterostructure
- Moritz Schneider
- Nanoscale Hybrid III-V Plasmonic Laser for Low-Power Photonic ICs
- Near-Memory Training of Neural Networks
- Neural Processing
- Nils Wistoff
- Noise Figure Measurement for Cryogenic System
- Norbert Felber
- On-Device Training Sparse Sub-Tensor Update Scheme Optimization for CNN-based tasks
- Optimal System Duty Cycling
- PULP
- Palm size chip NMR
- Pascal Hager
- Philipp Schönle
- Pirmin Vogel
- Positioning with Wireless Signals
- Prasadar
- Project Meetings
- Project Plan
- Quantum Transport Modeling of Interband Cascade Lasers (ICL)
- Quantum transport in 2D heterostructures
- Real-Time Optimization
- Reconfigurable Fully-Unrolled 2D-FFT Core Generator for Multi-Antenna mmWave Communication
- Research
- Robert Balas
- SSR combined with FREP in LLVM/Clang
- Signal to Noise Ratio Estimation for 3G standards
- Simulation of 2D artificial cilia metasurface in COMSOL
- Simultaneous Sensing and Communication
- Smart Goggles for Visual In-Action Feedback in Ski Jumping (1 B/S)
- Smart Googles for Visual In-Action Feedback in Ski Jumping (1 B/S)
- Software
- Stefan Lippuner
- Stefan Mach
- Students' Interanational Competitions: F1(AMZ), Swissloop, Educational Rockets
- Students' International Competitions: F1(AMZ), Swissloop, Educational Rockets
- Super Resolution Radar/Imaging at mm-Wave frequencies
- Taimir Aguacil
- Tbenz
- Telecommunications
- Test page
- Test project
- Theory, Algorithms, and Hardware for Beyond 5G
- Time Synchronization for 3G Mobile Communications
- Unconventional phase change memory device concepts for in-memory and neuromorphic computin
- VLSI Implementation of a Systolic Array for LMMSE Detection in mmWave Massive MIMO-OFDM
- Versatile HW SW Digital PHY for inter chip communication
- Weekly Reports