Short pages

Showing below up to 20 results in range #101 to #120.

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101. (hist) ‎PREM on PULP ‎[1,304 bytes]
102. (hist) ‎Configurable Ultra Low Power LDO ‎[1,306 bytes]
103. (hist) ‎Exploring Algorithms for Early Seizure Detection ‎[1,329 bytes]
104. (hist) ‎SW/HW Predictability and Security ‎[1,333 bytes]
105. (hist) ‎Modeling High Bandwidth Memory for Rapid Design Space Exploration (1-3S/B) ‎[1,378 bytes]
106. (hist) ‎Extending Our DMA Architecture with SiFives TileLink Protocol (1-3S/B) ‎[1,408 bytes]
107. (hist) ‎Design of low mismatch DAC used for VAD ‎[1,409 bytes]
108. (hist) ‎Scan Chain Fault Injection in a PULP SoC (1S) ‎[1,421 bytes]
109. (hist) ‎Receiver design for the DigRF 4G high speed serial link ‎[1,431 bytes]
110. (hist) ‎Beat Cadence ‎[1,442 bytes]
111. (hist) ‎Precise Ultra-low-power Timer ‎[1,446 bytes]
112. (hist) ‎Digital Audio Processor for Cellular Applications ‎[1,448 bytes]
113. (hist) ‎Designing a Scalable Miniature I/O DMA (1-2B/1-3S/M) ‎[1,466 bytes]
114. (hist) ‎Multiuser Equalization and Detection for 3GPP TD-SCDMA ‎[1,484 bytes]
115. (hist) ‎Creating A Boundry Scan Generator (1-3S/B/2-3G) ‎[1,488 bytes]
116. (hist) ‎Design of a D-Band Variable Gain Amplifier for 6G Communication ‎[1,522 bytes]
117. (hist) ‎Positioning for the cellular Internet of Things ‎[1,525 bytes]
118. (hist) ‎ASIC Design of a Gaussian Message Passing Processor ‎[1,526 bytes]
119. (hist) ‎Pirmin Vogel ‎[1,528 bytes]
120. (hist) ‎Novel Metastability Mitigation Technique ‎[1,561 bytes]

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