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Showing below up to 154 results in range #751 to #904.

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  1. Vector-based Manycore HPC Cluster Exploration for 5G Communication Algorithm (1-2M)‏‎ (11:41, 31 October 2023)
  2. Vector-based Parallel Programming Optimization of Communication Algorithm (1-2S/B)‏‎ (11:57, 31 October 2023)
  3. Routing 1000s of wires in Network-on-Chips (1-2S/M)‏‎ (16:23, 31 October 2023)
  4. Energy Efficient SoCs‏‎ (15:59, 1 November 2023)
  5. Runtime partitioning of L1 memory in Mempool (M)‏‎ (10:38, 2 November 2023)
  6. Enabling Efficient Systolic Execution on MemPool (M)‏‎ (10:39, 2 November 2023)
  7. On-Device Training Sparse Sub-Tensor Update Scheme Optimization for CNN-based tasks (SA or MA)‏‎ (13:29, 2 November 2023)
  8. Creating A Technology-independent USB1.0 Host Implementation Targetting ASICSs (1-3S/B)‏‎ (09:27, 3 November 2023)
  9. Fitting Power Consumption of an IP-based HLS Approach to Real Hardware (1-3S)‏‎ (09:27, 3 November 2023)
  10. Design of an Energy-Efficient Ethernet Interface for Linux-capable Systems‏‎ (09:28, 3 November 2023)
  11. Design of a CAN Interface to Enable Reliable Sensors-to-Processors Communication for Automotive-oriented Embedded Applications (1M)‏‎ (09:28, 3 November 2023)
  12. Design of a Scalable High-Performance and Low-Power Interface Based on the I3C Protocol (1M)‏‎ (09:30, 3 November 2023)
  13. Design of a Scalable High-Performance and Low-Power Interface Based on the I3C Protocol (B/1-3S)‏‎ (09:34, 3 November 2023)
  14. Extension and Evaluation of TinyDMA (1-2S/B/2-3G)‏‎ (09:35, 3 November 2023)
  15. Finalizing and Releasing Our Open-source AXI4 IPs (1-3S/B/2-3G)‏‎ (09:36, 3 November 2023)
  16. Extending Our DMA Architecture with SiFives TileLink Protocol (1-3S/B)‏‎ (09:36, 3 November 2023)
  17. Enhancing Our DMA Engine With Virtual Memory (M/1-3S/B)‏‎ (09:36, 3 November 2023)
  18. Towards a High-performance Open-source Verification Suite for AXI-based Systems (M/1-3S/B)‏‎ (09:38, 3 November 2023)
  19. Improving SystemVerilog Support for Free And Open-Source EDA Tools (1-3S/B)‏‎ (09:38, 3 November 2023)
  20. Modeling High Bandwidth Memory for Rapid Design Space Exploration (1-3S/B)‏‎ (09:39, 3 November 2023)
  21. Creating A Boundry Scan Generator (1-3S/B/2-3G)‏‎ (09:55, 3 November 2023)
  22. IP-Based SoC Generation and Configuration (1-3S/B)‏‎ (10:19, 3 November 2023)
  23. Towards Formal Verification of the iDMA Engine (1-3S/B)‏‎ (10:21, 3 November 2023)
  24. Evaluating The Use of Snitch In The PsPIN RISC-V In-network Accelerator (M)‏‎ (10:24, 3 November 2023)
  25. Creating A Reshuffling Mid-end For Reorganizing Data Inside The Compute Cluster (1-3S/B)‏‎ (10:25, 3 November 2023)
  26. Creating an At-memory Low-overhead Bufferless Matrix Transposition Accelerator (1-3S/B)‏‎ (10:27, 3 November 2023)
  27. Advanced Physical Design: Reinforcement Learning for Macro Placement and Mix-Placer (B/1-2S)‏‎ (10:50, 3 November 2023)
  28. Scaleout Study on Interleaved Memory Transfers in Huge Manycore Systems with Multiple HBM Channels (M/1-3S)‏‎ (11:18, 3 November 2023)
  29. Big Data Analytics Benchmarks for Ara‏‎ (11:34, 3 November 2023)
  30. Efficient Execution of Transformers in RISC-V Vector Machines with Custom HW acceleration (M)‏‎ (11:35, 3 November 2023)
  31. New RVV 1.0 Vector Instructions for Ara‏‎ (11:37, 3 November 2023)
  32. Virtual Memory Ara‏‎ (11:38, 3 November 2023)
  33. Investigating the Cost of Special-Case Handling in Low-Precision Floating-Point Dot Product Units (1S)‏‎ (18:20, 3 November 2023)
  34. Federico Villani‏‎ (18:30, 8 November 2023)
  35. Design of Streaming Data Platform for High-Speed ADC Data‏‎ (11:16, 9 November 2023)
  36. Designing a Fault-Tolerant On-Chip Interconnect (1-2S/M)‏‎ (17:19, 13 November 2023)
  37. Practical Reconfigurable Intelligent Surfaces (RIS)‏‎ (12:25, 16 November 2023)
  38. Advanced Data Movers for Modern Neural Networks‏‎ (16:18, 23 November 2023)
  39. Cycle-Accurate Event-Based Simulation of Snitch Core‏‎ (22:54, 23 November 2023)
  40. Hardware Acceleration‏‎ (17:04, 24 November 2023)
  41. Acceleration and Transprecision‏‎ (17:05, 24 November 2023)
  42. Taping a Safer Silicon Implementation of Snitch (M/2-3S)‏‎ (18:47, 24 November 2023)
  43. Modeling FlooNoC in GVSoC (S/M)‏‎ (15:15, 4 December 2023)
  44. Object Detection and Tracking on the Edge‏‎ (10:55, 5 December 2023)
  45. Design of a Low Power Smart Sensing Multi-modal Vision Platform‏‎ (11:02, 5 December 2023)
  46. Design of a High-​performance Hybrid PTZ for Multimodal Vision Systems‏‎ (11:07, 5 December 2023)
  47. Battery indifferent wearable Ultrasound‏‎ (18:42, 6 December 2023)
  48. Automatic unplugging detection for Ultrasound probes‏‎ (18:42, 6 December 2023)
  49. In-ear EEG signal acquisition‏‎ (19:01, 6 December 2023)
  50. EEG earbud‏‎ (19:01, 6 December 2023)
  51. Advanced EEG glasses‏‎ (19:01, 6 December 2023)
  52. Design of combined Ultrasound and PPG systems‏‎ (19:02, 6 December 2023)
  53. Wearable Ultrasound for Artery monitoring‏‎ (19:02, 6 December 2023)
  54. Machine Learning for extracting Muscle features from Ultrasound raw data‏‎ (19:02, 6 December 2023)
  55. Smart e-glasses for concealed recording of EEG signals‏‎ (19:02, 6 December 2023)
  56. Ultrasound based hand gesture recognition‏‎ (19:03, 6 December 2023)
  57. Design of combined Ultrasound and Electromyography systems‏‎ (19:03, 6 December 2023)
  58. Ultra low power wearable ultrasound probe‏‎ (19:03, 6 December 2023)
  59. EEG-based drowsiness detection‏‎ (19:03, 6 December 2023)
  60. 3D Matrix Multiplication Unit for ITA (1S)‏‎ (10:52, 12 December 2023)
  61. Physical Implementation of ITA (2S)‏‎ (10:52, 12 December 2023)
  62. Deep Learning Based Anomaly Detection in ECG Signals Using Foundation Models‏‎ (19:08, 14 December 2023)
  63. Exploratory Development of a Unified Foundational Model for Multi Biosignal Analysis‏‎ (18:00, 15 December 2023)
  64. Reliability by Switching the Embedded ISA in Ibex (1-2S/B/1M)‏‎ (11:55, 18 December 2023)
  65. Pretraining Foundational Models for EEG Signal Analysis Using Open Source Large Scale Datasets‏‎ (17:04, 18 December 2023)
  66. Design of a Scalable High-Performance and Low-Power Interface Based on the I3C Protocol (1-3S/B)‏‎ (17:17, 18 December 2023)
  67. Design and Implementation of a Fully-digital Platform-independent Integrated Temperature Sensor Enabling DVFS in Open-source Tapeouts (1-3S/B)‏‎ (17:18, 18 December 2023)
  68. Streaming Layer Normalization in ITA (M/1-2S)‏‎ (12:38, 21 December 2023)
  69. Marco Bertuletti‏‎ (11:29, 23 December 2023)
  70. RedCap-5G for IOT application on prototype taped-out silicon‏‎ (11:31, 23 December 2023)
  71. ASIC implementation of an interpolation-based wideband massive MIMO detector‏‎ (16:51, 8 January 2024)
  72. Integrated Information Processing‏‎ (16:53, 8 January 2024)
  73. NeuroSoC RISC-V Component (M/1-2S)‏‎ (17:26, 10 January 2024)
  74. Resource Partitioning of RPC DRAM‏‎ (09:32, 15 January 2024)
  75. HW/SW Safety and Security‏‎ (09:49, 15 January 2024)
  76. Benchmarking a heterogeneous 217-core MPSoC on HPC applications (M/1-3S)‏‎ (10:47, 25 January 2024)
  77. A Flexible FPGA-Based Peripheral Platform Extending Linux-Capable Systems on Chip (1-3S/B)‏‎ (10:49, 25 January 2024)
  78. High Performance SoCs‏‎ (10:54, 25 January 2024)
  79. Low Precision Ara for ML‏‎ (12:36, 29 January 2024)
  80. Spatz grows wings: Physical Implementation of a Vector-Powered Manycore System (2S)‏‎ (12:36, 29 January 2024)
  81. Extending the HERO RISC-V HPC stack to support multiple devices on heterogeneous SoCs (M/1-3S)‏‎ (12:19, 12 February 2024)
  82. A RISC-V fault-tolerant many-core accelerator for 5G Non-Terrestrial Networks (1-2S/B)‏‎ (13:02, 12 February 2024)
  83. Building an RTL top level for a Mempool-based Heterogeneous SoC (M/1-3S)‏‎ (15:57, 13 February 2024)
  84. Development of an implantable Force sensor for orthopedic applications‏‎ (18:57, 13 February 2024)
  85. Energy-Efficient Edge-Pursuit comparator for ultra-low power ADC‏‎ (13:36, 14 February 2024)
  86. Feature Extraction and Architecture Clustering for Keyword Spotting (1S)‏‎ (13:31, 15 February 2024)
  87. Extreme-Edge Experience Replay for Keyword Spotting‏‎ (13:56, 15 February 2024)
  88. Learning at the Edge with Hardware-Aware Algorithms‏‎ (13:59, 15 February 2024)
  89. Bandwidth Efficient NEureka‏‎ (14:05, 15 February 2024)
  90. Probabilistic training algorithms for quantized neural networks‏‎ (14:06, 15 February 2024)
  91. Exploring NAS spaces with C-BRED‏‎ (14:08, 15 February 2024)
  92. Probing the limits of fake-quantised neural networks‏‎ (14:08, 15 February 2024)
  93. Exploring schedules for incremental and annealing quantization algorithms‏‎ (14:15, 15 February 2024)
  94. Writing a Hero runtime for EPAC (1-3S/B)‏‎ (15:27, 15 February 2024)
  95. Integrating an Open-Source Double-Precision Floating-Point DivSqrt Unit into CVFPU (1S)‏‎ (15:40, 15 February 2024)
  96. Extending our FPU with Internal High-Precision Accumulation (M)‏‎ (15:54, 15 February 2024)
  97. Hardware Exploration of Shared-Exponent MiniFloats (M)‏‎ (15:55, 15 February 2024)
  98. Investigation of Quantization Strategies for Retentive Networks (1S)‏‎ (14:28, 18 February 2024)
  99. On-Board Software for PULP on a Satellite‏‎ (14:29, 18 February 2024)
  100. Implementation of an Accelerator for Retentive Networks (1-2S)‏‎ (14:31, 18 February 2024)
  101. Zephyr RTOS on PULP‏‎ (15:28, 19 February 2024)
  102. Real-time Linux on RISC-V‏‎ (15:29, 19 February 2024)
  103. Deep Learning Projects‏‎ (19:29, 19 February 2024)
  104. Neural Recording Interface and Signal Processing‏‎ (10:26, 21 February 2024)
  105. Neural Recording Interface and Spike Sorting Algorithm‏‎ (10:36, 21 February 2024)
  106. FPGA mapping of RPC DRAM‏‎ (20:29, 21 February 2024)
  107. Efficient collective communications in FlooNoC (1M)‏‎ (19:52, 22 February 2024)
  108. Digital Medical Ultrasound Imaging‏‎ (16:16, 23 February 2024)
  109. Implementation of a Cache Reliability Mechanism (1S/M)‏‎ (14:22, 27 February 2024)
  110. Creating a Free and Open-Source Verification Environment for Our New DMA Engine (1-3S/B)‏‎ (14:22, 27 February 2024)
  111. Fault-Tolerant Floating-Point Units (M)‏‎ (14:23, 27 February 2024)
  112. Designing a Scalable Miniature I/O DMA (1-2B/1-3S/M)‏‎ (14:24, 27 February 2024)
  113. On-Device Federated Continual Learning on Nano-Drone Swarms‏‎ (00:49, 29 February 2024)
  114. On-Device Learnable Embeddings for Acoustic Environments‏‎ (01:10, 29 February 2024)
  115. Audio Visual Speech Separation and Recognition (1S/1M)‏‎ (14:15, 1 March 2024)
  116. Resource Partitioning of Caches‏‎ (14:07, 4 March 2024)
  117. Design of Power-Noise-Efficient Discrete-Time Amplifier Using Open-Source Tools‏‎ (17:01, 4 March 2024)
  118. An Ultra-Low-Power Neuromorphic Spiking Neuron Design‏‎ (17:01, 4 March 2024)
  119. Classification of Evoked Local-Field Potentials in Rat Barrel Cortex using Hyper-dimensional Computing‏‎ (19:58, 10 March 2024)
  120. Graph neural networks for epileptic seizure detection‏‎ (19:58, 10 March 2024)
  121. Data Augmentation Techniques in Biosignal Classification‏‎ (19:59, 10 March 2024)
  122. Compression of iEEG Data‏‎ (20:01, 10 March 2024)
  123. Contrastive Learning for Self-supervised Clustering of iEEG Data for Epileptic Patients‏‎ (20:01, 10 March 2024)
  124. Real-Time Motor-Imagery Classification Using Neuromorphic Processor‏‎ (20:02, 10 March 2024)
  125. Deep neural networks for seizure detection‏‎ (20:02, 10 March 2024)
  126. Mixed-Precision Neural Networks for Brain-Computer Interface Applications‏‎ (20:04, 10 March 2024)
  127. Spiking Neural Network for Motor Function Decoding Based on Neural Dust‏‎ (20:05, 10 March 2024)
  128. Human Intranet‏‎ (20:09, 10 March 2024)
  129. GPT on the edge‏‎ (11:35, 12 March 2024)
  130. Benchmarking a RISC-V-based Server on LLMs/Foundation Models (SA or MA)‏‎ (11:37, 12 March 2024)
  131. A reduction-capable AXI XBAR for fast M-to-1 communication (1M)‏‎ (11:45, 13 March 2024)
  132. GDBTrace: A Post-Simulation Trace-Based RISC-V GDB Debugging Server (1S)‏‎ (11:49, 13 March 2024)
  133. IBM Research‏‎ (15:20, 15 March 2024)
  134. ASR-Waveformer‏‎ (11:50, 18 March 2024)
  135. Biomedical Circuits, Systems, and Applications‏‎ (19:16, 23 March 2024)
  136. Benchmarking RISC-V-based Accelerator Cards for Inference (multiple SA)‏‎ (13:24, 12 April 2024)
  137. A RISC-V ISA Extension for Scalar Chaining in Snitch (M)‏‎ (18:58, 21 April 2024)
  138. ASIC implementation of a beamspace massive MIMO-OFDM detector for 5G/6G‏‎ (15:51, 28 April 2024)
  139. A RISC-V ISA Extension for Pseudo Dual-Issue Monte Carlo in Snitch (1M/2S)‏‎ (14:25, 2 May 2024)
  140. Accelerating Matrix Multiplication on a 216-core MPSoC (1M)‏‎ (14:25, 2 May 2024)
  141. Andrea Cossettini‏‎ (17:17, 3 May 2024)
  142. Ultrasound-EMG combined hand gesture recognition‏‎ (17:18, 3 May 2024)
  143. Ultrasound Doppler system development‏‎ (17:18, 3 May 2024)
  144. Digital‏‎ (11:57, 8 May 2024)
  145. Main Page‏‎ (12:31, 8 May 2024)
  146. Waterflow Monitoring with Doppler Ultrasound (1S)‏‎ (11:24, 14 May 2024)
  147. Sound-Based Vehicle Classification and Counting (1-2S)‏‎ (11:24, 14 May 2024)
  148. Spectrometry for Environmental Monitoring (1-2S/M)‏‎ (11:34, 14 May 2024)
  149. Structural Health Monitoring (SHM) System (1-2S/M)‏‎ (11:47, 14 May 2024)
  150. Multi-Modal Environmental Sensing With GAP9 (1-2S)‏‎ (14:14, 16 May 2024)
  151. Low-Power Environmental Sensing‏‎ (14:21, 16 May 2024)
  152. Smart Agriculture System (1-2S)‏‎ (17:09, 16 May 2024)
  153. Intelligent Disaster Early-Warning System (1-2S/M)‏‎ (17:09, 16 May 2024)
  154. Air Quality Prediction in Office Rooms (1-2S/M)‏‎ (17:10, 16 May 2024)

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