Pages with the most categories
From iis-projects
Showing below up to 50 results in range #221 to #270.
View (previous 50 | next 50) (20 | 50 | 100 | 250 | 500)
- On-Device Learnable Embeddings for Acoustic Environments (9 categories)
- Counter-based Fast Power Estimation using FPGAs (M/1-3S) (9 categories)
- Wireless In Action Data Streaming in Ski Jumping (1 B/S) (9 categories)
- Outdoor Precision Object Tracking for Rockfall Experiments (9 categories)
- Extending the HERO RISC-V HPC stack to support multiple devices on heterogeneous SoCs (M/1-3S) (9 categories)
- Smart Goggles for Visual In-Action Feedback in Ski Jumping (1 M 1-2B/S) (9 categories)
- Trace Debugger for custom RISC-V Core (9 categories)
- BLISS - Battery-Less Identification System for Security (9 categories)
- Developing a Transposition Unit to Accelerate ML Workloads (1-3S/B) (9 categories)
- An all Standard-Cell Based Energy Efficient HW Accelerator for DSP and Deep Learning Applications (9 categories)
- Approximate Matrix Multiplication based Hardware Accelerator to achieve the next 10x in Energy Efficiency: Training Strategy And Algorithmic optimizations (9 categories)
- Active-Set QP Solver on FPGA (9 categories)
- Neural Network Algorithms and Interfaces with Accelerators for Embedded Platforms with Real World Applications (9 categories)
- Extending the HERO SDK to support asynchronous offloading (M/1-3S) (9 categories)
- Investigation of Quantization Strategies for Retentive Networks (1S) (9 categories)
- On - Device Continual Learning for Seizure Detection on GAP9 (9 categories)
- Hardware/software codesign neural decoding algorithm for “neural dust” (9 categories)
- Spatz grows wings: Physical Implementation of a Vector-Powered Manycore System (2S) (9 categories)
- Multisensory system for performance analysis in ski jumping (M/1-2S/B) (9 categories)
- Writing a Hero runtime for EPAC (1-3S/B) (9 categories)
- Flexfloat DL Training Framework (9 categories)
- Benchmarking a heterogeneous 217-core MPSoC on HPC applications (M/1-3S) (9 categories)
- Adaptively Controlled Polarization And Hysteresis Curve Tracing For Polymer Piezoelectrics (1 S/B) (9 categories)
- ASIC Development of 5G-NR LDPC Decoder (9 categories)
- Exploring NAS spaces with C-BRED (9 categories)
- High-Speed Digital-to-Analog Converter (DAC) for massive MIMO testing in 65nm CMOS (9 categories)
- Implementation of a Heterogeneous System for Image Processing on an FPGA (S) (9 categories)
- Adding Linux Support to our DMA Engine (1-2S/B) (9 categories)
- Investigation of the high-performance multi-threaded OoO IBM A2O Core (1-3S) (9 categories)
- Efficient Execution of Transformers in RISC-V Vector Machines with Custom HW acceleration (M) (9 categories)
- An Efficient Compiler Backend for Snitch (1S/B) (9 categories)
- Analog building blocks for mmWave manipulation (8 categories)
- Wearable Smart Camera With Deep Learning Algorithms For Automatic Detecion (8 categories)
- Indoor Smart Tracking of Hospital instrumentation (8 categories)
- Spiking Neural Network for Autonomous Navigation (8 categories)
- A reduction-capable AXI XBAR for fast M-to-1 communication (1M) (8 categories)
- Predictable Execution on GPU Caches (8 categories)
- Deep Convolutional Autoencoder for iEEG Signals (8 categories)
- LightProbe - Implementation of compressed-sensing algorithms (8 categories)
- Digital Control of a DC/DC Buck Converter (8 categories)
- Novel Metastability Mitigation Technique (8 categories)
- Autonomous Sensing For Trains In The IoT Era (8 categories)
- PVT Dynamic Adaptation in PULPv3 (8 categories)
- Improved Reacquisition for the 5G Cellular IoT (8 categories)
- Smart Wearable System For Vital Sign Monitoring Exploiting On Board and Cloud Machine Learning (8 categories)
- Triple-Core PULPissimo (8 categories)
- An Energy Efficient Brain-Computer Interface using Mr.Wolf (8 categories)
- Open Power-On Chip Controller Study and Integration (8 categories)
- Securing Block Ciphers against SCA and SIFA (8 categories)
- Time Synchronization for 3G Mobile Communications (8 categories)
