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Showing below up to 100 results in range #51 to #150.

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  1. (hist) ‎Peripheral Event Linking System for Real-time Capable Energy Efficient SoCs ‎[8,002 bytes]
  2. (hist) ‎Practical Reconfigurable Intelligent Surfaces (RIS) ‎[7,979 bytes]
  3. (hist) ‎Floating-Point Divide & Square Root Unit for Transprecision ‎[7,966 bytes]
  4. (hist) ‎Spatz grows wings: Physical Implementation of a Vector-Powered Manycore System (2S) ‎[7,927 bytes]
  5. (hist) ‎RISC-V based Implementation of Secure Ranging According to IEEE 802.15.4z UWB ‎[7,824 bytes]
  6. (hist) ‎GDBTrace: A Post-Simulation Trace-Based RISC-V GDB Debugging Server (1S) ‎[7,808 bytes]
  7. (hist) ‎Mixed-Precision Neural Networks for Brain-Computer Interface Applications ‎[7,773 bytes]
  8. (hist) ‎Physical Implementation of MemPool, PULP's Manycore System (1M/1-2S) ‎[7,696 bytes]
  9. (hist) ‎Self-Supervised User Positioning in Cell-Free Massive MIMO Systems ‎[7,691 bytes]
  10. (hist) ‎Towards the Ariane Desktop: Display Output for Ariane on FPGA under Linux (S/B/G) ‎[7,663 bytes]
  11. (hist) ‎A RISC-V ISA Extension for Scalar Chaining in Snitch (M) ‎[7,624 bytes]
  12. (hist) ‎XNORLAX: Fused XNOR-LATCH Custom-Standard-Cell-Based Processing-in-Memory ‎[7,358 bytes]
  13. (hist) ‎Neural Network Algorithms and Interfaces with Accelerators for Embedded Platforms with Real World Applications ‎[7,337 bytes]
  14. (hist) ‎Smart Patch For Heath Care And Rehabilitation ‎[7,308 bytes]
  15. (hist) ‎Cell-Free mmWave Massive MIMO Communication ‎[7,265 bytes]
  16. (hist) ‎Weekly Reports ‎[7,258 bytes]
  17. (hist) ‎An all Standard-Cell Based Energy Efficient HW Accelerator for DSP and Deep Learning Applications ‎[7,241 bytes]
  18. (hist) ‎Integrating Ultrasound Technology into a Fitness Tracking Device (1M, 2 B/S) ‎[7,201 bytes]
  19. (hist) ‎A RISC-V ISA Extension for Pseudo Dual-Issue Monte Carlo in Snitch (1M/2S) ‎[7,168 bytes]
  20. (hist) ‎Baseband Meets CPU ‎[7,100 bytes]
  21. (hist) ‎Towards Autonomous Navigation for Nano-Blimps ‎[7,095 bytes]
  22. (hist) ‎Embedded Audio Source Localization Exploiting Coincidence Detection in Asynchronous Spike Streams ‎[7,095 bytes]
  23. (hist) ‎Benchmarking a heterogeneous 217-core MPSoC on HPC applications (M/1-3S) ‎[7,075 bytes]
  24. (hist) ‎Integrated Information Processing ‎[7,051 bytes]
  25. (hist) ‎Variable Bit Precision Logic for Deep Learning and Artificial Intelligence ‎[6,993 bytes]
  26. (hist) ‎Semi-Custom Digital VLSI for Processing-in-Memory ‎[6,973 bytes]
  27. (hist) ‎Digital ‎[6,954 bytes]
  28. (hist) ‎Hardware Acceleration ‎[6,884 bytes]
  29. (hist) ‎Bridging QuantLab with LPDNN ‎[6,871 bytes]
  30. (hist) ‎Evaluating memory access pattern specializations in OoO, server-grade cores (M) ‎[6,859 bytes]
  31. (hist) ‎ASIC implementation of a beamspace massive MIMO-OFDM detector for 5G/6G ‎[6,836 bytes]
  32. (hist) ‎Scalable Heterogeneous L1 Memory Interconnect for Smart Accelerator Coupling in Ultra-Low Power Multicores ‎[6,805 bytes]
  33. (hist) ‎On-Device Training Sparse Sub-Tensor Update Scheme Optimization for CNN-based tasks (SA or MA) ‎[6,772 bytes]
  34. (hist) ‎Single-Bit-Synapse Spiking Neural System-on-Chip ‎[6,767 bytes]
  35. (hist) ‎Accelerating Applications Relying on Matrix-Vector-Product-Like Operations ‎[6,754 bytes]
  36. (hist) ‎Learning at the Edge with Hardware-Aware Algorithms ‎[6,742 bytes]
  37. (hist) ‎Cerebellum: Design of a Programmable Smart-Peripheral for the Ariane Core ‎[6,724 bytes]
  38. (hist) ‎Pretraining Foundational Models for EEG Signal Analysis Using Open Source Large Scale Datasets ‎[6,711 bytes]
  39. (hist) ‎Low Power Neural Network For Multi Sensors Wearable Devices ‎[6,700 bytes]
  40. (hist) ‎Multisensory system for performance analysis in ski jumping (M/1-2S/B) ‎[6,642 bytes]
  41. (hist) ‎Exploring NAS spaces with C-BRED ‎[6,633 bytes]
  42. (hist) ‎PULP in space - Fault Tolerant PULP System for Critical Space Applications ‎[6,628 bytes]
  43. (hist) ‎Hardware Accelerators for Lossless Quantized Deep Neural Networks ‎[6,626 bytes]
  44. (hist) ‎Improving Scene Labeling with Hyperspectral Data ‎[6,596 bytes]
  45. (hist) ‎Low-Energy Cluster-Coupled Vector Coprocessor for Special-Purpose PULP Acceleration ‎[6,550 bytes]
  46. (hist) ‎Low-Resolution 5G Beamforming Codebook Design ‎[6,549 bytes]
  47. (hist) ‎Accelerating Matrix Multiplication on a 216-core MPSoC (1M) ‎[6,535 bytes]
  48. (hist) ‎Timing Channel Mitigations for RISC-V Cores ‎[6,515 bytes]
  49. (hist) ‎Serverless Benchmarks on RISC-V (M) ‎[6,436 bytes]
  50. (hist) ‎Investigation of Quantization Strategies for Retentive Networks (1S) ‎[6,431 bytes]
  51. (hist) ‎Efficient collective communications in FlooNoC (1M) ‎[6,417 bytes]
  52. (hist) ‎Towards Self-Sustainable Unmanned Aerial Vehicles ‎[6,408 bytes]
  53. (hist) ‎Digital Medical Ultrasound Imaging ‎[6,404 bytes]
  54. (hist) ‎PULPonFPGA: Lightweight Virtual Memory Support - Physically Contiguous Memory ‎[6,362 bytes]
  55. (hist) ‎AMZ Driverless Competition Embedded Systems Projects ‎[6,350 bytes]
  56. (hist) ‎PULP-Shield for Autonomous UAV ‎[6,268 bytes]
  57. (hist) ‎A Wearable Wireless Kidney Function Monitoring System For BioMedical Applications ‎[6,249 bytes]
  58. (hist) ‎Exploratory Development of a Unified Foundational Model for Multi Biosignal Analysis ‎[6,238 bytes]
  59. (hist) ‎Vector-based Manycore HPC Cluster Exploration for 5G Communication Algorithm (1-2M) ‎[6,238 bytes]
  60. (hist) ‎Smart Virtual Memory Sharing ‎[6,235 bytes]
  61. (hist) ‎Exploring schedules for incremental and annealing quantization algorithms ‎[6,214 bytes]
  62. (hist) ‎Adaptively Controlled Polarization And Hysteresis Curve Tracing For Polymer Piezoelectrics (1 S/B) ‎[6,198 bytes]
  63. (hist) ‎Physical Implementation of Ara, PULP's Vector Machine (1-2S) ‎[6,175 bytes]
  64. (hist) ‎Development of statistics and contention monitoring unit for PULP ‎[6,171 bytes]
  65. (hist) ‎MemPool on HERO (1S) ‎[6,159 bytes]
  66. (hist) ‎Deep Unfolding of Iterative Optimization Algorithms ‎[6,125 bytes]
  67. (hist) ‎Deep Learning Based Anomaly Detection in ECG Signals Using Foundation Models ‎[6,124 bytes]
  68. (hist) ‎Towards Online Training of CNNs: Hebbian-Based Deep Learning ‎[6,095 bytes]
  69. (hist) ‎ML based Quantitative Movement Analysis on a Portable IoT Camera (1-2S/B) ‎[6,070 bytes]
  70. (hist) ‎Study and Development of Intelligent Capability for Small-Size UAVs ‎[6,065 bytes]
  71. (hist) ‎Deep-Learning Based Phoneme Recognition from a Ultra-Low Power Spiking Cochlea ‎[6,065 bytes]
  72. (hist) ‎Approximate Matrix Multiplication based Hardware Accelerator to achieve the next 10x in Energy Efficiency: Full System Intregration ‎[6,051 bytes]
  73. (hist) ‎Smart Goggles for Visual In-Action Feedback in Ski Jumping (1 M 1-2B/S) ‎[6,042 bytes]
  74. (hist) ‎Ibex: Tightly-Coupled Accelerators and ISA Extensions ‎[6,038 bytes]
  75. (hist) ‎VLSI Implementation of a Systolic Array for LMMSE Detection in mmWave Massive MIMO-OFDM ‎[6,032 bytes]
  76. (hist) ‎Fast Accelerator Context Switch for PULP ‎[5,986 bytes]
  77. (hist) ‎VLSI Design of an Asynchronous LDPC Decoder ‎[5,968 bytes]
  78. (hist) ‎Self-Learning Drones based on Neural Networks ‎[5,956 bytes]
  79. (hist) ‎Securing Block Ciphers against SCA and SIFA ‎[5,949 bytes]
  80. (hist) ‎Convolution Neural Networks on our Ultra-Low Power Mult-Core Plattform PULP ‎[5,909 bytes]
  81. (hist) ‎BigPULP: Multicluster Synchronization Extensions ‎[5,902 bytes]
  82. (hist) ‎Autoencoder Accelerator for On-Chip Semi-Supervised Learning ‎[5,886 bytes]
  83. (hist) ‎Efficient NB-IoT Uplink Design ‎[5,872 bytes]
  84. (hist) ‎A FPGA-based data streaming system that enables real-time monitoring of cell culture and neuroactivities ‎[5,826 bytes]
  85. (hist) ‎Evaluating SoA Post-Training Quantization Algorithms ‎[5,818 bytes]
  86. (hist) ‎BigPULP: Shared Virtual Memory Multicluster Extensions ‎[5,818 bytes]
  87. (hist) ‎Huawei Research ‎[5,815 bytes]
  88. (hist) ‎Deep neural networks for seizure detection ‎[5,798 bytes]
  89. (hist) ‎Vector-based Parallel Programming Optimization of Communication Algorithm (1-2S/B) ‎[5,792 bytes]
  90. (hist) ‎Real-Time Motor-Imagery Classification Using Neuromorphic Processor ‎[5,779 bytes]
  91. (hist) ‎Wireless In Action Data Streaming in Ski Jumping (1 B/S) ‎[5,770 bytes]
  92. (hist) ‎Approximate Matrix Multiplication based Hardware Accelerator to achieve the next 10x in Energy Efficiency: Training Strategy And Algorithmic optimizations ‎[5,756 bytes]
  93. (hist) ‎Streaming Integer Extensions for Snitch (M/1-2S) ‎[5,741 bytes]
  94. (hist) ‎Autonomous Sensing For Trains In The IoT Era ‎[5,717 bytes]
  95. (hist) ‎Indoor Smart Tracking of Hospital instrumentation ‎[5,695 bytes]
  96. (hist) ‎Transformer Deployment on Heterogeneous Many-Core Systems ‎[5,672 bytes]
  97. (hist) ‎Edge Computing for Long-Term Wearable Biomedical Systems ‎[5,664 bytes]
  98. (hist) ‎HERO: TLB Invalidation ‎[5,657 bytes]
  99. (hist) ‎Mapping Networks on Reconfigurable Binary Engine Accelerator ‎[5,655 bytes]
  100. (hist) ‎Hardware Constrained Neural Architechture Search ‎[5,648 bytes]

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