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Showing below up to 500 results in range #201 to #700.

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  1. Receiver design for the DigRF 4G high speed serial link‏‎ (17:37, 21 December 2017)
  2. LTE-Advanced RF Front-end Design in 28nm CMOS Technology‏‎ (17:38, 21 December 2017)
  3. Successive Approximation Register (SAR) ADC‏‎ (17:43, 21 December 2017)
  4. Analog Layout Engine‏‎ (17:44, 21 December 2017)
  5. Mattia‏‎ (18:47, 21 December 2017)
  6. Low Power Geolocalization And Indoor Localization‏‎ (13:36, 11 January 2018)
  7. BigPULP: Multicluster Synchronization Extensions‏‎ (12:17, 22 January 2018)
  8. High Speed FPGA Trigger Logic for Particle Physics Experiments‏‎ (21:42, 30 January 2018)
  9. Autonomous Sensors For Underwater Monitoring In Smart Navy Systems‏‎ (17:21, 31 January 2018)
  10. Smart Wearable System For Vital Sign Monitoring Exploiting On Board and Cloud Machine Learning‏‎ (17:21, 31 January 2018)
  11. A Wearable System To Control Phone And Electronic Device Without Hands‏‎ (17:22, 31 January 2018)
  12. Low Power One bit Microphone for Acoustic Imaging Using A Parallel Processor‏‎ (11:40, 2 February 2018)
  13. Wake Up Radio For Energy Efficient Communication System and IC Design‏‎ (11:54, 2 February 2018)
  14. Zero Power Touch Sensor and Reciever For Body Communication‏‎ (11:58, 2 February 2018)
  15. Monocular Vision-based Object Following on Nano-size Robotic Blimp‏‎ (16:14, 20 February 2018)
  16. Covariant Feature Detector on Parallel Ultra Low Power Architecture‏‎ (16:16, 20 February 2018)
  17. Towards Self-Sustainable Unmanned Aerial Vehicles‏‎ (16:17, 20 February 2018)
  18. Study and Development of Intelligent Capability for Small-Size UAVs‏‎ (16:18, 20 February 2018)
  19. Towards Autonomous Navigation for Nano-Blimps‏‎ (16:20, 20 February 2018)
  20. Self-Learning Drones based on Neural Networks‏‎ (16:26, 20 February 2018)
  21. A Waypoint-based Navigation System for Nano-Size UAVs in GPS-denied Environments‏‎ (16:35, 20 February 2018)
  22. Design and Implementation of an Approximate Floating Point Unit‏‎ (10:58, 21 February 2018)
  23. Fabian Schuiki‏‎ (11:02, 21 February 2018)
  24. Biomedical Systems on Chip‏‎ (19:55, 22 February 2018)
  25. PULP-Shield for Autonomous UAV‏‎ (11:06, 23 February 2018)
  26. Signal-Processing and Data-Compression on Beaglebone Black used as embedded HPC-performance-monitoring device‏‎ (16:19, 27 February 2018)
  27. Linux Driver for built-in ADC using DMA and Programmable Real-Time Unit (PRU) support on Beaglebone Black used as embedded HPC-performance-monitoring device‏‎ (16:19, 27 February 2018)
  28. A Wireless Sensor Network for HPC monitoring‏‎ (16:22, 27 February 2018)
  29. Interference Cancellation for EC-GSM-IoT‏‎ (19:52, 21 March 2018)
  30. Hyperdimensional Computing‏‎ (10:46, 25 April 2018)
  31. Charging System for Implantable Electronics‏‎ (13:05, 27 April 2018)
  32. GUI-developement for an action-cam-based eye tracking device‏‎ (11:10, 3 May 2018)
  33. Switched Capacitor Based Bandgap-Reference‏‎ (11:13, 3 May 2018)
  34. Efficient NB-IoT Uplink Design‏‎ (16:58, 7 May 2018)
  35. LTE IoT Network Synchronization‏‎ (16:32, 18 May 2018)
  36. Sub-Noise Floor Channel Tracking‏‎ (16:33, 18 May 2018)
  37. Enabling Standalone Operation‏‎ (14:41, 23 May 2018)
  38. Optimal System Duty Cycling‏‎ (14:44, 23 May 2018)
  39. Standard Cell Compatible Memory Array Design‏‎ (15:54, 23 May 2018)
  40. Implementation of a NB-IoT Positioning System‏‎ (16:36, 23 May 2018)
  41. Embedded Artificial Intelligence:Systems And Applications‏‎ (13:52, 12 June 2018)
  42. Physics is looking for PULP‏‎ (16:50, 21 June 2018)
  43. Creating a HDMI Video Interface for PULP‏‎ (09:37, 10 July 2018)
  44. A Wireless Sensor Network for a Smart Building Monitor and Control‏‎ (21:42, 30 July 2018)
  45. Ultrafast Medical Ultrasound imaging on a GPU‏‎ (12:13, 1 August 2018)
  46. Birds Long Term Monitoring With Ultra Low Power Wireless Sensor Node‏‎ (10:14, 3 August 2018)
  47. Students' Interanational Competitions: F1(AMZ), Swissloop, Educational Rockets‏‎ (10:55, 3 August 2018)
  48. Students' International Competitions: F1(AMZ), Swissloop, Educational Rockets‏‎ (11:50, 3 August 2018)
  49. Fast and Accurate Multiclass Inference for Brain–Computer Interfaces‏‎ (17:53, 7 August 2018)
  50. FPGA Optimizations of Dense Binary Hyperdimensional Computing‏‎ (10:11, 8 August 2018)
  51. Sensor Fusion for Rockfall Sensor Node‏‎ (11:51, 21 August 2018)
  52. Development of a Rockfall Sensor Node‏‎ (11:55, 21 August 2018)
  53. BigPULP: Shared Virtual Memory Multicluster Extensions‏‎ (15:05, 23 August 2018)
  54. Cryptography‏‎ (21:04, 24 August 2018)
  55. IoT Turbo Decoder‏‎ (09:37, 14 September 2018)
  56. Shared Correlation Accelerator for an RF SoC‏‎ (09:38, 14 September 2018)
  57. Engineering For Kids‏‎ (16:11, 18 September 2018)
  58. Turbo Equalization for Cellular IoT‏‎ (11:43, 13 November 2018)
  59. PREM on PULP‏‎ (18:20, 20 November 2018)
  60. Taimir Aguacil‏‎ (16:24, 23 November 2018)
  61. Analog IC Design‏‎ (18:10, 4 December 2018)
  62. Brunn test‏‎ (12:02, 5 December 2018)
  63. Karim Badawi‏‎ (15:06, 5 December 2018)
  64. Low-Energy Cluster-Coupled Vector Coprocessor for Special-Purpose PULP Acceleration‏‎ (15:50, 7 December 2018)
  65. Trace Debugger for custom RISC-V Core‏‎ (11:27, 11 December 2018)
  66. Digital Audio Interface for Smart Intensive Computing Triggering‏‎ (17:27, 22 January 2019)
  67. Scalable Heterogeneous L1 Memory Interconnect for Smart Accelerator Coupling in Ultra-Low Power Multicores‏‎ (21:21, 29 January 2019)
  68. Moritz Schneider‏‎ (16:36, 30 January 2019)
  69. Pulse Oximetry Fachpraktikum‏‎ (15:59, 18 February 2019)
  70. Elliptic Curve Accelerator for zkSNARKs‏‎ (15:02, 4 March 2019)
  71. Beat Cadence‏‎ (11:01, 18 March 2019)
  72. Deep Learning for Brain-Computer Interface‏‎ (20:22, 1 April 2019)
  73. Switched-capacitor power amplifier for IoT mobile communications: design of signal processing path‏‎ (15:55, 6 May 2019)
  74. Ultra-low power sampling front-end for acquisition of physiological signals‏‎ (16:06, 6 May 2019)
  75. CMOS power amplifier for field measurements in MRI systems‏‎ (16:06, 6 May 2019)
  76. Analysis and Design of Power Efficient RF/ mm-Wave LC-tank Oscillator in 28nm for 5G communication applications‏‎ (16:07, 6 May 2019)
  77. Design and implementation of the front-end for a portable ionizing radiation detector‏‎ (12:23, 9 May 2019)
  78. Experimental Validation of Impact Ionization Models for TCAD Simulation by a Novel Characterization Technique‏‎ (10:30, 5 June 2019)
  79. Design and Exploitation of a Test-Bench for Non-Destructive Characterization of the Susceptibility of Silicon Carbide (SiC) Power Devices to Cosmic Radiation‏‎ (16:31, 5 June 2019)
  80. Freedom from Interference in Heterogeneous COTS SoCs‏‎ (17:40, 19 June 2019)
  81. Predictable Execution on GPU Caches‏‎ (17:41, 19 June 2019)
  82. PREM Intervals and Loop Tiling‏‎ (18:00, 19 June 2019)
  83. Compiler Profiling and Optimizing‏‎ (18:20, 19 June 2019)
  84. Extending the RISCV backend of LLVM to support PULP Extensions‏‎ (18:27, 19 June 2019)
  85. NAND Flash Open Research Platform‏‎ (11:06, 11 July 2019)
  86. Minimal Cost RISC-V core‏‎ (17:24, 21 August 2019)
  87. A Demonstrator of Non-Synchronized Hyperdimensional Body Area Networks‏‎ (16:42, 27 August 2019)
  88. Influence of the Initial FilamentGeometry on the Forming Step in CBRAM‏‎ (18:39, 3 September 2019)
  89. Influence of the Initial Filament Geometry on the Forming Step in CBRAM‏‎ (15:34, 4 September 2019)
  90. Simulation of Negative Capacitance Ferroelectric Transistor‏‎ (15:37, 4 September 2019)
  91. Computation of Phonon Bandstructure in III-V Nanostructures‏‎ (15:37, 4 September 2019)
  92. Design study of tunneling transistors based on a core/shell nanowire structures‏‎ (15:38, 4 September 2019)
  93. Investigation of the source starvation effect in III-V MOSFET‏‎ (15:40, 4 September 2019)
  94. Implementation of a 2-D model for Li-ion batteries‏‎ (15:41, 4 September 2019)
  95. Ab-initio Simulation of Strained Thermoelectric Materials‏‎ (15:43, 4 September 2019)
  96. Simulation of Li-ion batteries and comparison with experimental data‏‎ (15:43, 4 September 2019)
  97. Full-band simulations of InP/GaAsSb/InP Double Heterojunction Bipolar Transistors (DHBTs)‏‎ (15:44, 4 September 2019)
  98. Interfacing PULP with a Brain-Inspired Ultra-Low Power Spiking Cochlea‏‎ (18:36, 5 September 2019)
  99. Design of Scalable Event-driven Neural-Recording Digital Interface‏‎ (18:40, 5 September 2019)
  100. Near-Memory Training of Neural Networks‏‎ (09:17, 11 September 2019)
  101. Application Specific Frequency Synthesizers (Analog/Digital PLLs)‏‎ (14:52, 25 September 2019)
  102. EECIS‏‎ (15:18, 25 September 2019)
  103. Deep-Learning Based Phoneme Recognition from a Ultra-Low Power Spiking Cochlea‏‎ (16:33, 3 October 2019)
  104. AnalogInt‏‎ (20:25, 25 October 2019)
  105. Cell Measurements for the 5G Internet of Things‏‎ (11:55, 29 October 2019)
  106. Herschmi‏‎ (15:03, 29 October 2019)
  107. Improving Resiliency of Hyperdimensional Computing‏‎ (15:51, 29 October 2019)
  108. Toward Superposition of Brain-Computer Interface Models‏‎ (15:52, 29 October 2019)
  109. Positioning for the cellular Internet of Things‏‎ (13:14, 31 October 2019)
  110. Interference Cancellation for the cellular Internet of Things‏‎ (13:15, 31 October 2019)
  111. Indoor Positioning with Bluetooth‏‎ (12:12, 4 November 2019)
  112. Design of an LTE Module for the Internet of Things‏‎ (14:20, 4 November 2019)
  113. Design of a VLIW processor architecture based on RISC-V‏‎ (10:25, 5 November 2019)
  114. Design of a Fused Multiply Add Floating Point Unit‏‎ (10:26, 5 November 2019)
  115. Audio Video Preprocessing In Parallel Ultra Low Power Platform‏‎ (10:27, 5 November 2019)
  116. PULPonFPGA: Hardware L2 Cache‏‎ (10:27, 5 November 2019)
  117. Image and Video Processing‏‎ (10:29, 5 November 2019)
  118. DMA Streaming Co-processor‏‎ (10:30, 5 November 2019)
  119. Developing a small portable neutron detector for detecting smuggled nuclear material‏‎ (10:32, 5 November 2019)
  120. Accelerators for object detection and tracking‏‎ (10:57, 5 November 2019)
  121. Design of an on-field adaptable pulse-processing unit for semicondutor radiation detectors‏‎ (18:26, 5 November 2019)
  122. Characterization of the susceptibility to cosmic radiation of wide bandgap power devices by radioactive sources and at cryogenic temperatures‏‎ (18:33, 5 November 2019)
  123. Ternary Weights Engine For Efficient Many Channels Spike Sorting Applications‏‎ (10:05, 18 November 2019)
  124. HERO: TLB Invalidation‏‎ (17:19, 18 November 2019)
  125. FPGA Testbed Implementation for Bluetooth Indoor Positioning‏‎ (21:47, 18 November 2019)
  126. PULPonFPGA: Lightweight Virtual Memory Support - Software Cache‏‎ (13:43, 29 November 2019)
  127. PULPonFPGA: Lightweight Virtual Memory Support - Physically Contiguous Memory‏‎ (13:43, 29 November 2019)
  128. Exploring Algorithms for Early Seizure Detection‏‎ (18:47, 6 January 2020)
  129. Toward hyperdimensional active perception: learning compressed sensorimotor control by demonstration‏‎ (20:12, 9 February 2020)
  130. Pirmin Vogel‏‎ (15:39, 3 March 2020)
  131. Real-Time ECG Contractions Classification‏‎ (19:15, 9 March 2020)
  132. Real-Time Embedded Classification of Neural Activity in Rat Barrel Cortex‏‎ (19:20, 9 March 2020)
  133. Final Presentation‏‎ (18:53, 22 March 2020)
  134. A computational memory unit using phase-change memory devices‏‎ (11:33, 17 April 2020)
  135. Accurate deep learning inference using computational memory‏‎ (12:51, 17 April 2020)
  136. Palm size chip NMR‏‎ (19:29, 7 May 2020)
  137. Timing Channel Mitigations for RISC-V Cores‏‎ (18:16, 20 May 2020)
  138. Nanoelectrode array biosensors - programmable non-overlapping clocks generator project‏‎ (07:56, 26 May 2020)
  139. Circuits and Systems for Nanoelectrode Array Biosensors‏‎ (13:27, 26 May 2020)
  140. An Energy Efficient Brain-Computer Interface using Mr.Wolf‏‎ (11:09, 21 July 2020)
  141. TCNs vs. LSTMs for Embedded Platforms‏‎ (11:10, 21 July 2020)
  142. Subject specific embeddings for transfer learning in brain-computer interfaces‏‎ (11:12, 21 July 2020)
  143. Exploring features and algorithms for ultra-low-power closed-loop systems for epilepsy control‏‎ (11:22, 21 July 2020)
  144. A Snitch-based Compute Accelerator for HERO‏‎ (14:58, 29 July 2020)
  145. Tbenz‏‎ (16:48, 29 July 2020)
  146. Stefan Mach‏‎ (17:06, 29 July 2020)
  147. Floating-Point Divide & Square Root Unit for Transprecision‏‎ (17:09, 29 July 2020)
  148. IBM Research–Zurich‏‎ (17:40, 10 August 2020)
  149. Ibex: Bit-Manipulation Extension‏‎ (09:45, 28 August 2020)
  150. Ibex: FPGA Optimizations‏‎ (09:45, 28 August 2020)
  151. Deep Convolutional Autoencoder for iEEG Signals‏‎ (13:36, 9 September 2020)
  152. Positioning with Wireless Signals‏‎ (10:24, 28 September 2020)
  153. Heterogeneous SoCs‏‎ (18:41, 28 October 2020)
  154. Signal Acquisition and Clock Offset Compensation for High-Rate Pulse UWB PHYs‏‎ (12:09, 29 October 2020)
  155. Ara: Update PULP's Vector Processor with the recent RISC-V Vector Extension Development‏‎ (14:42, 29 October 2020)
  156. Channel Estimation for 5G Cellular IoT and Fast Fading Channels‏‎ (18:54, 29 October 2020)
  157. Power Optimization in Multipliers‏‎ (16:23, 30 October 2020)
  158. Evaluating the RiscV Architecture‏‎ (16:24, 30 October 2020)
  159. Energy Neutral Multi Sensors Wearable Device‏‎ (16:24, 30 October 2020)
  160. Bringing XNOR-nets (ConvNets) to Silicon‏‎ (16:25, 30 October 2020)
  161. Learning Image Compression with Convolutional Networks‏‎ (16:25, 30 October 2020)
  162. Improving our Smart Camera System‏‎ (16:26, 30 October 2020)
  163. AMZ Driverless Competition Embedded Systems Projects‏‎ (16:27, 30 October 2020)
  164. Nils Wistoff‏‎ (18:59, 30 October 2020)
  165. LightProbe‏‎ (14:14, 31 October 2020)
  166. IBM A2O Core‏‎ (11:15, 2 November 2020)
  167. PREM Runtime Scheduling Policies‏‎ (11:47, 2 November 2020)
  168. (M): A Flexible Peripheral System for High-Performance Systems on Chip‏‎ (12:16, 2 November 2020)
  169. Implementation of a Heterogeneous System for Image Processing on an FPGA‏‎ (12:48, 2 November 2020)
  170. SSR combined with FREP in LLVM/Clang‏‎ (13:02, 2 November 2020)
  171. DaCe on Snitch‏‎ (13:03, 2 November 2020)
  172. Implementation of a Heterogeneous System for Image Processing on an FPGA (S)‏‎ (17:26, 2 November 2020)
  173. MemPool on HERO‏‎ (18:42, 2 November 2020)
  174. ISA extensions in the Snitch Processor for Signal Processing (1M)‏‎ (19:24, 2 November 2020)
  175. Event-Driven Computing‏‎ (11:16, 5 November 2020)
  176. All-Digital In-Memory Processing‏‎ (12:23, 5 November 2020)
  177. A Recurrent Neural Network Speech Recognition Chip‏‎ (13:38, 10 November 2020)
  178. Energy-Efficient Brain-Inspired Hyperdimensional Computing‏‎ (13:38, 10 November 2020)
  179. Hardware Accelerators for Lossless Quantized Deep Neural Networks‏‎ (13:41, 10 November 2020)
  180. NVDLA meets PULP‏‎ (13:42, 10 November 2020)
  181. An Industrial-grade Bluetooth LE Mesh Network Solution‏‎ (15:34, 10 November 2020)
  182. Contextual Intelligence on Resource-constraint Bluetooth LE IoT Devices‏‎ (15:36, 10 November 2020)
  183. Embedded Gesture Recognition Using Novel Mini Radar Sensors‏‎ (15:36, 10 November 2020)
  184. A Wearable Wireless Kidney Function Monitoring System For BioMedical Applications‏‎ (15:37, 10 November 2020)
  185. Indoor Smart Tracking of Hospital instrumentation‏‎ (15:37, 10 November 2020)
  186. Wireless Sensing With Long Range Comminication (LoRa)‏‎ (15:37, 10 November 2020)
  187. Optogenetics And Game Theory Applied To Small Side Bird Using Smart Sensing‏‎ (15:38, 10 November 2020)
  188. Edge Computing for Long-Term Wearable Biomedical Systems‏‎ (15:38, 10 November 2020)
  189. Efficient Search Design for Hyperdimensional Computing‏‎ (15:39, 10 November 2020)
  190. Improving Cold-Start in Batteryless And Energy Harvesting Systems‏‎ (15:41, 10 November 2020)
  191. Energy Efficient Smart Devices For Construction Building Maintenance Hilti Collaboration‏‎ (15:41, 10 November 2020)
  192. Wearable Smart Camera With Deep Learning Algorithms For Automatic Detecion‏‎ (15:41, 10 November 2020)
  193. Adversarial Attacks Against Deep Neural Networks In Wearable Cameras‏‎ (15:41, 10 November 2020)
  194. Neuromorphic Intelligence In An Embedded System in Collaboration with AiCTX‏‎ (15:45, 10 November 2020)
  195. High-throughput Embedded System For Neurotechnology in collaboration with INI‏‎ (15:48, 10 November 2020)
  196. Design Of A Biomarker Assay Based On Responsive Magnetic Nanoparticles‏‎ (15:48, 10 November 2020)
  197. Pressure and acoustic Smart Sensors Network for Wind Turbines Monitoring‏‎ (15:48, 10 November 2020)
  198. Embedded Systems and autonomous UAVs‏‎ (16:59, 10 November 2020)
  199. Predictable Execution‏‎ (18:48, 10 November 2020)
  200. IP-Based SoC Generation and Configuration (1-3S)‏‎ (20:24, 10 November 2020)
  201. Design-Space Exploration of Low-Resolution Matrix-Vector Multipliers‏‎ (11:08, 12 November 2020)
  202. Low-Resolution 5G Beamforming Codebook Design‏‎ (11:37, 12 November 2020)
  203. Real-Time Optimization‏‎ (13:57, 12 November 2020)
  204. Deep Unfolding of Iterative Optimization Algorithms‏‎ (13:57, 12 November 2020)
  205. LightProbe - CNN-Based-Image-Reconstruction‏‎ (20:46, 12 November 2020)
  206. LightProbe - 192cha Multiplexer Stage (Rigid-Flex-PCB Project)‏‎ (20:47, 12 November 2020)
  207. Next-Gen Ultrasound Imaging Systems (Industry Student Projects & PhD Opportunity)‏‎ (20:48, 12 November 2020)
  208. Ultrasound High Speed Microbubble Tracking‏‎ (20:49, 12 November 2020)
  209. LightProbe - Thermal-Power aware on-head Beamforming‏‎ (20:50, 12 November 2020)
  210. LightProbe - Frontend Firmware and Control Side Channel‏‎ (20:51, 12 November 2020)
  211. 3D Ultrasound Bubble Tracking‏‎ (20:52, 12 November 2020)
  212. Satellite Internet of Things‏‎ (13:53, 13 November 2020)
  213. FPGA-based Testbed Implementation of an Extended-Coverage Point-to-Point Communication Link for the Internet of Things‏‎ (13:54, 13 November 2020)
  214. Next Generation Channel Decoder‏‎ (14:01, 13 November 2020)
  215. An all Standard-Cell Based Energy Efficient HW Accelerator for DSP and Deep Learning Applications‏‎ (15:31, 16 November 2020)
  216. FFT HDL Code Generator for Multi-Antenna mmWave Communication‏‎ (19:40, 16 November 2020)
  217. Autonomus Drones With Novel Sensors And Ultra Wide Band‏‎ (11:39, 30 November 2020)
  218. Smart Patch For Heath Care And Rehabilitation‏‎ (16:24, 30 November 2020)
  219. Matheus Cavalcante‏‎ (18:33, 8 December 2020)
  220. Improved Reacquisition for the 5G Cellular IoT‏‎ (14:04, 11 January 2021)
  221. ASIC Design of a Gaussian Message Passing Processor‏‎ (08:34, 20 January 2021)
  222. ASIC Design of a Sigma Point Processor‏‎ (08:34, 20 January 2021)
  223. Hardware Accelerator for Model Predictive Controller‏‎ (08:35, 20 January 2021)
  224. Fast Wakeup From Deep Sleep State‏‎ (08:35, 20 January 2021)
  225. Compressed Sensing for Wireless Biosignal Monitoring‏‎ (08:35, 20 January 2021)
  226. Convolution Neural Networks on our Ultra-Low Power Mult-Core Plattform PULP‏‎ (08:36, 20 January 2021)
  227. Autoencoder Accelerator for On-Chip Semi-Supervised Learning‏‎ (08:37, 20 January 2021)
  228. Extend the RI5CY core with priviledge extensions‏‎ (08:38, 20 January 2021)
  229. Implementation of the RISC-V Bit Manipulation (RVB) extensions for our RI5CY core‏‎ (08:42, 20 January 2021)
  230. MemPool on HERO (1S)‏‎ (19:07, 20 January 2021)
  231. Cerebellum: Design of a Programmable Smart-Peripheral for the Ariane Core‏‎ (19:05, 29 January 2021)
  232. Resilient Brain-Inspired Hyperdimensional Computing Architectures‏‎ (19:08, 29 January 2021)
  233. Level Crossing ADC For a Many Channels Neural Recording Interface‏‎ (19:10, 29 January 2021)
  234. RISC-V based Implementation of Secure Ranging According to IEEE 802.15.4z UWB‏‎ (19:10, 29 January 2021)
  235. Spiking Neural Network for Autonomous Navigation‏‎ (19:10, 29 January 2021)
  236. Event-Driven Convolutional Neural Network Modular Accelerator‏‎ (19:10, 29 January 2021)
  237. ASIC Design Projects‏‎ (19:13, 29 January 2021)
  238. Implementation of the RISC-V Bit Manipulation (RVB) extensions for our RISC-V core‏‎ (19:19, 29 January 2021)
  239. A Snitch-based Compute Accelerator for HERO (M/1-2S)‏‎ (23:59, 6 February 2021)
  240. Heroino: Design of the next CORE-V Microcontroller‏‎ (00:01, 7 February 2021)
  241. VLSI Implementation of a 5G Ciphering Accelerator‏‎ (10:05, 9 February 2021)
  242. OTDOA Positioning for LTE Cat-M‏‎ (15:50, 9 February 2021)
  243. ASIC Development of 5G-NR LDPC Decoder‏‎ (01:43, 10 February 2021)
  244. Wireless Communication Systems for the IoT‏‎ (01:45, 10 February 2021)
  245. Software-Defined Paging in the Snitch Cluster (2-3S)‏‎ (20:08, 15 February 2021)
  246. Event-Driven Vision on an embedded platform‏‎ (08:41, 17 February 2021)
  247. Efficient TNN compression‏‎ (08:41, 17 February 2021)
  248. Design and Evaluation of a Small Size Avalanche Beacon‏‎ (10:02, 22 February 2021)
  249. ISA extensions in the Snitch Processor for Signal Processing (M)‏‎ (00:08, 13 March 2021)
  250. A Flexible Peripheral System for High-Performance Systems on Chip (M)‏‎ (15:40, 15 March 2021)
  251. Stand-Alone Edge Computing with GAP8‏‎ (14:38, 14 April 2021)
  252. Neural Networks Framwork for Embedded Plattforms‏‎ (14:40, 14 April 2021)
  253. Ibex: Tightly-Coupled Accelerators and ISA Extensions‏‎ (12:52, 27 April 2021)
  254. Intelligent Power Management Unit (iPMU)‏‎ (11:40, 2 June 2021)
  255. PULP in space - Fault Tolerant PULP System for Critical Space Applications‏‎ (14:46, 2 June 2021)
  256. Andreas Kurth‏‎ (07:40, 11 June 2021)
  257. Ferroelectric Memristors for Artificial Neural Networks (IBM-Zurich)‏‎ (12:21, 23 June 2021)
  258. Integrated silicon photonic structures-Lumiphase‏‎ (13:53, 23 June 2021)
  259. Integrated silicon photonic structures‏‎ (13:58, 23 June 2021)
  260. Phase-change memory devices for emerging computing paradigms‏‎ (14:13, 23 June 2021)
  261. Finite Element Simulations of Transistors for Quantum Computing‏‎ (14:14, 23 June 2021)
  262. Manycore System on FPGA (M/S/G)‏‎ (10:41, 6 July 2021)
  263. Physical Implementation of MemPool, PULP's Manycore System (1M/1-2S)‏‎ (10:41, 6 July 2021)
  264. An RPC DRAM Implementation for Energy-Efficient ASICs (1-2S)‏‎ (15:18, 9 July 2021)
  265. A Snitch-Based SoC on iCE40 FPGAs (1-2S/B)‏‎ (15:18, 9 July 2021)
  266. Bringup and Evaluation of an Energy-efficient Heterogeneous Manycore Compute Platform (1-2S)‏‎ (15:19, 9 July 2021)
  267. Investigation of the high-performance multi-threaded OoO IBM A2O Core (1-3S)‏‎ (15:19, 9 July 2021)
  268. LLVM and DaCe for Snitch (1-2S)‏‎ (15:20, 9 July 2021)
  269. Ottocore: A Minimal RISC-V Core Designed for Teaching (B/2G)‏‎ (15:21, 9 July 2021)
  270. Towards the Ariane Desktop: Display Output for Ariane on FPGA under Linux (S/B/G)‏‎ (15:21, 9 July 2021)
  271. Physical Implementation of Ara, PULP's Vector Machine (1-2S)‏‎ (15:25, 9 July 2021)
  272. Unconventional phase change memory device concepts for in-memory and neuromorphic computin‏‎ (13:07, 23 July 2021)
  273. Test page‏‎ (12:30, 27 July 2021)
  274. Semi-Custom Digital VLSI for Processing-in-Memory‏‎ (14:33, 28 July 2021)
  275. SystemVerilog formatter for our LowRISC-based guidelines (2-3G)‏‎ (19:57, 29 July 2021)
  276. Fast Simulation of Manycore Systems (1S)‏‎ (17:20, 2 August 2021)
  277. Evaluating memory access pattern specializations in OoO, server-grade cores (M)‏‎ (13:25, 10 August 2021)
  278. DC-DC Buck converter in 65nm CMOS‏‎ (11:36, 20 August 2021)
  279. Low-Dropout Regulators for Magnetic Resonance Imaging‏‎ (11:38, 20 August 2021)
  280. High performance continuous-time Delta-Sigma ADC for magnetic resonance imaging‏‎ (11:40, 20 August 2021)
  281. Ultra-low power transceiver for implantable devices‏‎ (11:43, 20 August 2021)
  282. Inductive Charging Circuit for Implantable Devices‏‎ (11:43, 20 August 2021)
  283. Design of a 25 Gbps SerDes for optical chip-to-chip communication‏‎ (11:44, 20 August 2021)
  284. High Performance Digitally-Assisted Time Domain ADC Design for DPLL used in Cellular IOT‏‎ (11:45, 20 August 2021)
  285. High Power Efficient Digitally Controlled Oscillator Design for Cellular IOT‏‎ (11:45, 20 August 2021)
  286. Design of Charge-Pump PLL in 22nm for 5G communication applications‏‎ (15:51, 20 August 2021)
  287. Design of Time-Encoded Spiking Neural Networks (IBM-Zurich)‏‎ (10:54, 31 August 2021)
  288. Bluetooth Low Energy network with optimized data throughput‏‎ (17:18, 14 September 2021)
  289. A mmWave Voltage-Controlled-Oscillator (VCO) for beyond 5G applications‏‎ (15:31, 15 September 2021)
  290. 5G Cellular RF Front-end Design in 22nm CMOS Technology‏‎ (15:36, 15 September 2021)
  291. Analog building blocks for mmWave manipulation‏‎ (15:44, 15 September 2021)
  292. Low Latency Brain-Machine Interfaces‏‎ (09:18, 16 September 2021)
  293. Hyper-Dimensional Computing Based Predictive Maintenance‏‎ (09:18, 16 September 2021)
  294. Towards global Brain-Computer Interfaces‏‎ (09:20, 16 September 2021)
  295. Combining Spiking Neural Networks with Hyperdimensional Computing for Autonomous Navigation‏‎ (09:23, 16 September 2021)
  296. Exploring feature selection and classification algorithms for ultra-low-power closed-loop systems for epilepsy control‏‎ (09:25, 16 September 2021)
  297. Every individual on the planet should have a real chance to obtain personalized medical therapy‏‎ (17:04, 16 September 2021)
  298. Characterization techniques for silicon photonics-Lumiphase‏‎ (17:05, 16 September 2021)
  299. Implementation of Computationally Efficient Scattering Mechanisms for Periodic Devices and 2D Materials‏‎ (17:06, 16 September 2021)
  300. Electrothermal characterization of van der Waals Heterostructures with a partial overlap‏‎ (17:06, 16 September 2021)
  301. Finite element modeling of electrochemical random access memory‏‎ (17:06, 16 September 2021)
  302. Influence of the Initial Filament Geometry on the Forming Step in CBRAM.‏‎ (17:07, 16 September 2021)
  303. Nanoscale Hybrid III-V Plasmonic Laser for Low-Power Photonic ICs‏‎ (17:09, 16 September 2021)
  304. Design space exploration of InP Heterojunction Bipolar Transistors (DHBTs)‏‎ (17:09, 16 September 2021)
  305. Quantum transport in 2D heterostructures‏‎ (17:10, 16 September 2021)
  306. Development of an efficient algorithm for quantum transport codes‏‎ (17:10, 16 September 2021)
  307. Investigation of Metal Diffusion in Oxides for CBRAM Applications‏‎ (17:11, 16 September 2021)
  308. Investigation of Redox Processes in CBRAM‏‎ (17:12, 16 September 2021)
  309. Combining Multi Sensor Imaging and Machine Learning for Robust Far-Field Vision‏‎ (15:53, 11 October 2021)
  310. Implementing A Low-Power Sensor Node Network‏‎ (15:53, 11 October 2021)
  311. VLSI Design of an Asynchronous LDPC Decoder‏‎ (17:36, 20 October 2021)
  312. LightProbe - Implementation of compressed-sensing algorithms‏‎ (10:37, 26 October 2021)
  313. Training and Deploying Next-Generation Quantized Neural Networks on Microcontrollers‏‎ (11:32, 29 October 2021)
  314. RISC-V base ISA for ultra-low-area cores (2-3G)‏‎ (13:15, 15 November 2021)
  315. Multi issue OoO Ariane Backend (M)‏‎ (15:50, 17 November 2021)
  316. Transforming MemPool into a CGRA (M)‏‎ (15:51, 17 November 2021)
  317. Integrating Hardware Accelerators into Snitch‏‎ (16:15, 19 November 2021)
  318. SW/HW Predictability and Security‏‎ (21:03, 19 November 2021)
  319. XNORLAX: Fused XNOR-LATCH Custom-Standard-Cell-Based Processing-in-Memory‏‎ (19:29, 21 November 2021)
  320. Accelerating Applications Relying on Matrix-Vector-Product-Like Operations‏‎ (19:45, 21 November 2021)
  321. Audio Signal Processing‏‎ (19:59, 21 November 2021)
  322. Robert Balas‏‎ (10:30, 22 November 2021)
  323. Self-Supervised User Positioning in Cell-Free Massive MIMO Systems‏‎ (17:27, 23 November 2021)
  324. Securing Block Ciphers against SCA and SIFA‏‎ (18:43, 23 November 2021)
  325. Peak-to-average power Reduction‏‎ (14:16, 24 November 2021)
  326. Low Resolution Neural Networks‏‎ (14:52, 24 November 2021)
  327. Energy-efficient Circuits for Fully Wireless Brain-machine Interfaces‏‎ (19:19, 25 November 2021)
  328. Benjamin Weber‏‎ (17:17, 30 November 2021)
  329. Digitally-Controlled Analog Subtractive Sound Synthesis‏‎ (12:56, 4 December 2021)
  330. Neural Network Algorithms and Interfaces with Accelerators for Embedded Platforms with Real World Applications‏‎ (17:30, 6 December 2021)
  331. Implementation of an AES Hardware Processing Engine (B/S)‏‎ (19:14, 6 December 2021)
  332. Serverless Benchmarks on RISC-V (M)‏‎ (21:41, 6 December 2021)
  333. Short Range Radars For Biomedical Application‏‎ (12:46, 17 December 2021)
  334. Prasadar‏‎ (14:00, 3 January 2022)
  335. Real-time eye movement analysis on a tablet computer‏‎ (15:09, 6 January 2022)
  336. Memory Augmented Neural Networks in Brain-Computer Interfaces‏‎ (21:31, 9 January 2022)
  337. Hardware Constrained Neural Architechture Search‏‎ (21:34, 9 January 2022)
  338. Visualization of Neural Architecture Search Spaces‏‎ (01:39, 10 January 2022)
  339. Real-Time Embedded Systems‏‎ (09:54, 10 January 2022)
  340. Non-blocking Algorithms in Real-Time Operating Systems‏‎ (18:59, 10 January 2022)
  341. Beamspace processing for 5G mmWave massive MIMO on GPU‏‎ (00:16, 11 January 2022)
  342. Improved State Estimation on PULP-based Nano-UAVs‏‎ (22:17, 26 January 2022)
  343. Deep Learning-based Global Local Planner for Autonomous Nano-drones‏‎ (12:11, 27 January 2022)
  344. Ultra-wideband Concurrent Ranging‏‎ (16:58, 4 February 2022)
  345. Reconfigurable Fully-Unrolled 2D-FFT Core Generator for Multi-Antenna mmWave Communication‏‎ (16:32, 8 February 2022)
  346. Passive Radar for UAV Detection using Machine Learning‏‎ (16:12, 9 February 2022)
  347. Through Wall Radar Imaging using Machine Learning‏‎ (16:15, 9 February 2022)
  348. Simultaneous Sensing and Communication‏‎ (16:16, 9 February 2022)
  349. Autonomous Mapping with Nano-Drones UWB and Novel Depth Sensors‏‎ (15:09, 11 February 2022)
  350. Improved Collision Avoidance for Nano-drones‏‎ (21:25, 15 February 2022)
  351. Low-power Temperature-insensitive Timer‏‎ (11:06, 21 February 2022)
  352. Ultrasound‏‎ (16:37, 23 February 2022)
  353. Autonomous Obstacle Avoidance with Nano-Drones and Novel Depth Sensors‏‎ (14:07, 10 March 2022)
  354. Mauro Salomon‏‎ (10:47, 5 April 2022)
  355. Next Generation Synchronization Signals‏‎ (10:51, 5 April 2022)
  356. Advanced 5G Repetition Combining‏‎ (10:52, 5 April 2022)
  357. Matthias Korb‏‎ (14:17, 5 April 2022)
  358. VLSI Implementation Polar Decoder using High Level Synthesis‏‎ (14:17, 5 April 2022)
  359. A Novel Execution Scheme for Ultra-tiny CNNs Aboard Nano-UAVs‏‎ (14:33, 17 May 2022)
  360. Low-Power Time Synchronization for IoT Applications‏‎ (13:34, 25 May 2022)
  361. GRAND Hardware Implementation‏‎ (14:36, 25 May 2022)
  362. Forward error-correction ASIC using GRAND‏‎ (18:16, 27 May 2022)
  363. Low-Complexity MIMO Detection‏‎ (13:54, 30 May 2022)
  364. Theory, Algorithms, and Hardware for Beyond 5G‏‎ (17:24, 30 May 2022)
  365. Quantum Transport Modeling of Interband Cascade Lasers (ICL)‏‎ (10:19, 31 May 2022)
  366. Energy Efficient Autonomous UAVs‏‎ (15:02, 13 June 2022)
  367. Low-power time synchronization for IoT applications‏‎ (10:55, 16 June 2022)
  368. Hypervisor Extension for Ariane (M)‏‎ (08:49, 21 June 2022)
  369. Watchdog Timer for PULP‏‎ (08:49, 21 June 2022)
  370. Triple-Core PULPissimo‏‎ (08:49, 21 June 2022)
  371. Adding Linux Support to our DMA Engine (1-2S/B)‏‎ (12:12, 21 June 2022)
  372. Enhancing our DMA Engine with Vector Processing Capabilities (1-2S/B)‏‎ (12:13, 21 June 2022)
  373. Implementation of a Small and Energy-Efficient RISC-V-based Vector Accelerator (1M)‏‎ (10:00, 30 June 2022)
  374. Analysis of Low-Power Wide Area Network Technologies for the Internet of Things‏‎ (15:34, 11 July 2022)
  375. Development of a fingertip blood pressure sensor‏‎ (16:56, 12 July 2022)
  376. Enabling Standalone Operation for a Mobile Health Platform‏‎ (16:57, 12 July 2022)
  377. Design and Implementation of a multi-mode multi-master I2C peripheral‏‎ (16:57, 12 July 2022)
  378. Optimal System Duty Cycling for a Mobile Health Platform‏‎ (16:57, 12 July 2022)
  379. Android Software Design‏‎ (16:57, 12 July 2022)
  380. Cell-Free mmWave Massive MIMO Communication‏‎ (21:34, 13 July 2022)
  381. Event-based navigation on autonomous nano-drones‏‎ (18:25, 26 July 2022)
  382. Huawei Research‏‎ (11:11, 1 August 2022)
  383. Efficient TNN Inference on PULP Systems‏‎ (15:14, 4 August 2022)
  384. Knowledge Distillation for Embedded Machine Learning‏‎ (15:14, 4 August 2022)
  385. Evaluating An Ultra low Power Vision Node‏‎ (15:16, 4 August 2022)
  386. Integration Of A Smart Vision System‏‎ (15:36, 4 August 2022)
  387. PULP’s CLIC extensions for fast interrupt handling‏‎ (15:06, 5 August 2022)
  388. PULP Freertos with LLVM‏‎ (16:51, 5 August 2022)
  389. RVfplib‏‎ (13:25, 12 August 2022)
  390. An Efficient Compiler Backend for Snitch (1S/B)‏‎ (14:34, 15 August 2022)
  391. A Unified Compute Kernel Library for Snitch (1-2S)‏‎ (09:49, 17 August 2022)
  392. Designing a Power Management Unit for PULP SoCs‏‎ (11:22, 18 August 2022)
  393. PULP‏‎ (10:09, 19 August 2022)
  394. Efficient Synchronization of Manycore Systems (M/1S)‏‎ (12:08, 29 August 2022)
  395. Integrating Hardware Accelerators into Snitch (1S)‏‎ (13:57, 7 September 2022)
  396. On-Device Training Sparse Sub-Tensor Update Scheme Optimization for CNN-based tasks‏‎ (12:12, 14 September 2022)
  397. Streaming Integer Extensions for Snitch (M/1-2S)‏‎ (14:19, 15 September 2022)
  398. Machine Learning for extracting Muscle features using Ultrasound 2‏‎ (16:56, 16 September 2022)
  399. Ultrasound Low power WiFi with IMX7‏‎ (16:56, 16 September 2022)
  400. Ultrasound signal processing acceleration with CUDA‏‎ (16:57, 16 September 2022)
  401. Minimum Variance Beamforming for Wearable Ultrasound Probes‏‎ (16:57, 16 September 2022)
  402. Machine Learning for extracting Muscle features using Ultrasound‏‎ (16:57, 16 September 2022)
  403. Compression of Ultrasound data on FPGA‏‎ (16:57, 16 September 2022)
  404. LightProbe - 200G Remote DMA for GPU FPGA Data Transfers‏‎ (16:58, 16 September 2022)
  405. Time Gain Compensation for Ultrasound Imaging‏‎ (16:58, 16 September 2022)
  406. LightProbe - WIFI extension (PCB)‏‎ (16:59, 16 September 2022)
  407. Alias-Free Oscillator Synchronization for Arbitrary Waveforms‏‎ (09:48, 5 October 2022)
  408. Aliasing-Free Wavetable Music Synthesizer‏‎ (18:09, 9 October 2022)
  409. Test project‏‎ (18:15, 11 October 2022)
  410. Benchmarking a heterogeneous 217-core MPSoC on HPC applications‏‎ (11:46, 12 October 2022)
  411. Benchmarking a heterogeneous 217-core MPSoC on HPC applications (M/1-3S))‏‎ (11:48, 12 October 2022)
  412. SCMI Support for Power Controller Subsystem‏‎ (13:55, 12 October 2022)
  413. A Post-Simulation Trace-Based RISC-V GDB Debugging Server‏‎ (01:02, 13 October 2022)
  414. Extended Verification for Ara‏‎ (14:19, 18 October 2022)
  415. Implementing DSP Instructions in Banshee (1S)‏‎ (13:31, 27 October 2022)
  416. Counter-based Fast Power Estimation using FPGAs (M/1-3S)‏‎ (13:51, 27 October 2022)
  417. Towards a Technology-independent and Synthesizable AXI4 Performance Monitoring and Throttling Unit (1-2S)‏‎ (13:58, 27 October 2022)
  418. Flexfloat DL Training Framework‏‎ (10:13, 2 November 2022)
  419. Approximate Matrix Multiplication based Hardware Accelerator to achieve the next 10x in Energy Efficiency: Training Strategy And Algorithmic optimizations‏‎ (16:32, 3 November 2022)
  420. Approximate Matrix Multiplication based Hardware Accelerator to achieve the next 10x in Energy Efficiency: Full System Intregration‏‎ (16:50, 3 November 2022)
  421. Augmenting Our IPs with AXI Stream Extensions (M/1-2S)‏‎ (16:13, 6 November 2022)
  422. Efficient Memory Stream Handling in RISC-V-based Systems (M/1-2S)‏‎ (16:14, 6 November 2022)
  423. All the flavours of FFT on MemPool (1-2S/B)‏‎ (18:54, 9 November 2022)
  424. Molecular Binding Kinetics Modelling of NO2 on Graphene/hBN Heterostructure‏‎ (18:47, 10 November 2022)
  425. Feature Extraction for Speech Recognition (1S)‏‎ (11:00, 14 November 2022)
  426. Online Learning of User Features (1S)‏‎ (11:00, 14 November 2022)
  427. CLIC for the CVA6‏‎ (10:53, 15 November 2022)
  428. Coherence-Capable Write-Back L1 Data Cache for Ariane (M)‏‎ (16:32, 15 November 2022)
  429. Implementation of a Coherent Application-Class Multicore System (1-2S)‏‎ (16:41, 15 November 2022)
  430. Design of a Reconfigurable Vector Processor Cluster for Area Efficient Radar Processing (1M)‏‎ (20:42, 22 November 2022)
  431. Autonomous Sensing For Trains In The IoT Era‏‎ (08:36, 23 November 2022)
  432. Outdoor Precision Object Tracking for Rockfall Experiments‏‎ (08:37, 23 November 2022)
  433. Wearables in Fashion‏‎ (08:38, 23 November 2022)
  434. Biomedical System on Chips‏‎ (19:23, 23 November 2022)
  435. Exploration and Hardware Acceleration of Intra-Layer Mixed-Precision QNNs‏‎ (22:15, 23 November 2022)
  436. Stefan Lippuner‏‎ (10:47, 24 November 2022)
  437. Modular Frequency-Modulation (FM) Music Synthesizer‏‎ (12:35, 28 November 2022)
  438. Versatile HW SW Digital PHY for inter chip communication‏‎ (20:37, 15 December 2022)
  439. Analog Compute-in-Memory Accelerator Interface and Integration‏‎ (18:02, 16 December 2022)
  440. Novel Metastability Mitigation Technique‏‎ (18:03, 16 December 2022)
  441. Precise Ultra-low-power Timer‏‎ (18:04, 16 December 2022)
  442. Energy Efficient Circuits and IoT Systems Group‏‎ (15:19, 19 December 2022)
  443. Design of MEMs Sensor Interface‏‎ (15:19, 19 December 2022)
  444. Hardware/software codesign neural decoding algorithm for “neural dust”‏‎ (16:16, 9 January 2023)
  445. Christoph Leitner‏‎ (01:54, 12 January 2023)
  446. Bluetooth Low Energy receiver in 65nm CMOS‏‎ (12:24, 12 January 2023)
  447. Bridging QuantLab with LPDNN‏‎ (19:36, 12 January 2023)
  448. Completed‏‎ (19:43, 12 January 2023)
  449. Neural Architecture Search using Reinforcement Learning and Search Space Reduction‏‎ (12:58, 16 January 2023)
  450. Accelerating Stencil Workloads on Snitch using ISSRs (1-2S/B)‏‎ (22:29, 19 January 2023)
  451. Design of low mismatch DAC used for VAD‏‎ (17:04, 24 January 2023)
  452. Mixed-Signal Circuit Design‏‎ (14:26, 25 January 2023)
  453. High-Speed Digital-to-Analog Converter (DAC) for massive MIMO testing in 65nm CMOS‏‎ (14:29, 25 January 2023)
  454. High-Speed SAR ADC for next generation wireless communication in 12nm FinFET‏‎ (14:30, 25 January 2023)
  455. Wearables for Sports and Life Enhancement‏‎ (14:17, 28 January 2023)
  456. SmartRing‏‎ (10:45, 31 January 2023)
  457. BLISS - Battery-Less Identification System for Security‏‎ (10:45, 31 January 2023)
  458. Configurable Ultra Low Power LDO‏‎ (19:20, 13 February 2023)
  459. Simulation of 2D artificial cilia metasurface in COMSOL‏‎ (10:21, 14 February 2023)
  460. Noise Figure Measurement for Cryogenic System‏‎ (10:32, 14 February 2023)
  461. An Ultra-Compact High-Power CMOS Power Amplifier for Millimeter-Wave 5G Communications‏‎ (10:33, 14 February 2023)
  462. Design of a D-Band Variable Gain Amplifier for 6G Communication‏‎ (10:44, 14 February 2023)
  463. High resolution, low power Sigma Delta ADC‏‎ (11:29, 14 February 2023)
  464. Energy Efficient Serial Link‏‎ (11:44, 14 February 2023)
  465. Super Resolution Radar/Imaging at mm-Wave frequencies‏‎ (11:44, 14 February 2023)
  466. Machine Learning Assisted Direct Synthesis of Passive Networks‏‎ (11:44, 14 February 2023)
  467. Template‏‎ (15:44, 14 February 2023)
  468. Electrically verifying a CMOS Multi-Modal Electrochemical, Impedance, and Optical Cellular Sensing Array for Massively Paralleled Exoelectrogen Screening‏‎ (16:46, 17 February 2023)
  469. Charge and heat transport through graphene nanoribbon based devices‏‎ (17:28, 20 February 2023)
  470. Energy Efficient AXI Interface to Serial Link Physical Layer‏‎ (18:21, 20 February 2023)
  471. BirdGuard‏‎ (08:32, 23 February 2023)
  472. Mixed Signal IC Design‏‎ (17:27, 1 March 2023)
  473. Guillaume Mocquard‏‎ (17:55, 1 March 2023)
  474. Digital Control of a DC/DC Buck Converter‏‎ (18:06, 1 March 2023)
  475. Analog‏‎ (18:11, 1 March 2023)
  476. Peripheral Event Linking System for Real-time Capable Energy Efficient SoCs‏‎ (19:54, 1 March 2023)
  477. Ternary Neural Networks for Face Recognition‏‎ (09:54, 8 March 2023)
  478. Mapping Networks on Reconfigurable Binary Engine Accelerator‏‎ (09:55, 8 March 2023)
  479. Design of a Prototype Chip with Interleaved Memory and Network-on-Chip‏‎ (14:30, 8 March 2023)
  480. Efficient Banded Matrix Multiplication for Quantum Transport Simulations‏‎ (15:56, 1 May 2023)
  481. ASIC Implementation of Jammer Mitigation‏‎ (13:31, 10 May 2023)
  482. Novel Methods for Jammer Mitigation‏‎ (13:32, 10 May 2023)
  483. Weak-strong massive MIMO communication with low-resolution ADCs‏‎ (13:33, 10 May 2023)
  484. Optimizing the Pipeline in our Floating Point Architectures (1S)‏‎ (14:27, 15 May 2023)
  485. Artificial Reverberation for Embedded Systems‏‎ (12:39, 14 June 2023)
  486. Running Rust on PULP‏‎ (14:14, 29 June 2023)
  487. Implementing Configurable Dual-Core Redundancy‏‎ (14:15, 29 June 2023)
  488. Michael Rogenmoser‏‎ (17:30, 3 July 2023)
  489. Development of statistics and contention monitoring unit for PULP‏‎ (14:47, 7 July 2023)
  490. Fast Accelerator Context Switch for PULP‏‎ (16:27, 7 July 2023)
  491. Smart Goggles for Visual In-Action Feedback in Ski Jumping (1 B/S)‏‎ (23:11, 14 July 2023)
  492. Smart Googles for Visual In-Action Feedback in Ski Jumping (1 B/S)‏‎ (23:13, 14 July 2023)
  493. Modular Distributed Data Collection Platform‏‎ (12:58, 20 July 2023)
  494. Testbed Design for Self-sustainable IoT Sensors‏‎ (13:03, 20 July 2023)
  495. Towards Flexible and Printable Wearables‏‎ (13:06, 20 July 2023)
  496. Wireless EEG Acquisition and Processing‏‎ (15:04, 20 July 2023)
  497. Continual Learning for Adaptive EEG Monitoring in Epileptic Seizure Detection‏‎ (15:04, 20 July 2023)
  498. Adaptively Controlled Polarization And Hysteresis Curve Tracing For Polymer Piezoelectrics (1 S/B)‏‎ (18:14, 21 July 2023)
  499. Development Of A Test Bed For Ultrasonic Transducer Characterization (1 S/B)‏‎ (18:18, 21 July 2023)
  500. Ultrasound image data recycler‏‎ (18:19, 21 July 2023)

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