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Showing below up to 100 results in range #21 to #120.

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  1. Atretter‏‎ (11:20, 12 December 2014)
  2. Ultra-High-Efficiency Power Supply Management for Ultra-Low-Power Systems on Chip‏‎ (18:06, 3 February 2015)
  3. A Novel Constrained-Viterbi Algorithm with Linear Equalization and Grouping Assistance‏‎ (10:43, 9 February 2015)
  4. Turbo Decoder Design for High Code Rates‏‎ (10:45, 9 February 2015)
  5. High Throughput Turbo Decoder Design‏‎ (10:46, 9 February 2015)
  6. IcySoC‏‎ (12:48, 9 February 2015)
  7. Near-Optimal Reduced-Complexity Sequence Detectors for TD-HSPA‏‎ (13:49, 9 February 2015)
  8. Channel Decoding for TD-HSPA‏‎ (13:55, 9 February 2015)
  9. Exploitation of Inherent Error Resilience of Wireless Systems under Unreliable Silicon‏‎ (13:56, 9 February 2015)
  10. Data Mapping for Unreliable Memories‏‎ (13:56, 9 February 2015)
  11. Multiuser Equalization and Detection for 3GPP TD-SCDMA‏‎ (14:07, 9 February 2015)
  12. Android reliability governor‏‎ (17:24, 9 February 2015)
  13. Ultra Low Power Wake Up Radio for Wireless Sensor Network‏‎ (19:54, 9 February 2015)
  14. Infrared Wake Up Radio‏‎ (19:55, 9 February 2015)
  15. Ambient RF Energy harvesting for Wireless Sensor Network‏‎ (19:56, 9 February 2015)
  16. Thermal Control of Mobile Devices‏‎ (11:03, 10 February 2015)
  17. Successive Interference Cancellation for 3G Downlink‏‎ (18:59, 10 February 2015)
  18. Channel Estimation for TD-HSPA‏‎ (19:00, 10 February 2015)
  19. FPGA‏‎ (19:50, 10 February 2015)
  20. ASIC‏‎ (19:52, 10 February 2015)
  21. Design and Implementation of ultra low power vision system‏‎ (16:46, 11 February 2015)
  22. Audio‏‎ (17:28, 11 February 2015)
  23. Quantum Key Secured 100 Gbit/s Payload Encryption and its High-Speed Network Interfaces‏‎ (20:06, 17 February 2015)
  24. Hybrid Analog/Digital Leveling Loop for Very-Low-Distortion Oscillator‏‎ (20:06, 17 February 2015)
  25. Audio DAC Conversion Jitter Measurement System‏‎ (20:06, 17 February 2015)
  26. Efficient Digital Signal Processing in High-Channel-Count High-Frame-Rate 3D Ultrasound Imaging Systems‏‎ (20:10, 17 February 2015)
  27. Soft-Output Viterbi Equalizer as part of Evolved EDGE baseband ASIC‏‎ (10:04, 18 February 2015)
  28. Interference Cancellation for Evolved EDGE on the RazorEDGE baseband ASIC‏‎ (10:06, 18 February 2015)
  29. Norbert Felber‏‎ (13:56, 18 February 2015)
  30. Philipp Schönle‏‎ (10:52, 10 March 2015)
  31. Flexible Front-End Circuit for Biomedical Data Acquisition‏‎ (10:53, 10 March 2015)
  32. Wireless Biomedical Signal Acquisition Device‏‎ (10:54, 10 March 2015)
  33. Benjamin Sporrer‏‎ (13:01, 10 March 2015)
  34. High Performance Cellular Receivers in Very Advanced CMOS‏‎ (13:02, 10 March 2015)
  35. Telecommunications‏‎ (17:42, 24 March 2015)
  36. Design and Implementation of a Convolutional Neural Network Accelerator ASIC‏‎ (19:45, 24 March 2015)
  37. Putting Together What Fits Together - GrÆStl‏‎ (12:01, 26 March 2015)
  38. SHAre - An application Specific Instruction Set Processor for SHA-2/3‏‎ (12:09, 26 March 2015)
  39. High-Throughput Authenticated Encryption Architectures based on Block Ciphers‏‎ (12:25, 26 March 2015)
  40. A Unified-Multiplier Based Hardware Architecture for Elliptic Curve Cryptography‏‎ (12:26, 26 March 2015)
  41. A Trustworthy Three-Factor Authentication System‏‎ (14:01, 26 March 2015)
  42. A Multiview Synthesis Core in 65 nm CMOS‏‎ (15:49, 13 May 2015)
  43. Feature Extraction with Binarized Descriptors: ASIC Implementation and FPGA Environment‏‎ (15:57, 13 May 2015)
  44. Real-time View Synthesis using Image Domain Warping‏‎ (16:04, 13 May 2015)
  45. Evolved EDGE Physical Layer Incremental Redundancy Architecture‏‎ (14:12, 27 May 2015)
  46. MatPHY: An Open-Source Physical Layer Development Framework‏‎ (14:14, 27 May 2015)
  47. Autonomous Smart Watches: Hardware and Software Desing‏‎ (11:59, 28 July 2015)
  48. A Wearable System for long term monitoring of human physiological parameters with E skin sensors‏‎ (11:59, 28 July 2015)
  49. Eye movements‏‎ (14:43, 29 July 2015)
  50. RazorEDGE: An Evolved EDGE DBB ASIC‏‎ (17:15, 1 September 2015)
  51. Hardware/software co-programming on the Parallella platform‏‎ (14:26, 2 September 2015)
  52. Real-Time Stereo to Multiview Conversion‏‎ (09:09, 23 October 2015)
  53. Active-Set QP Solver on FPGA‏‎ (13:09, 2 November 2015)
  54. Vector Processor for In-Memory Computing‏‎ (13:10, 2 November 2015)
  55. An FPGA-Based Testbed for 3G Mobile Communications Receivers‏‎ (16:42, 9 December 2015)
  56. EvaLTE: A 2G/3G/4G Cellular Transceiver FMC‏‎ (17:07, 17 December 2015)
  57. EvalEDGE: A 2G Cellular Transceiver FMC‏‎ (17:10, 17 December 2015)
  58. Design of a Digital Audio Module for Ultra-Low Power Cellular Applications‏‎ (18:15, 17 December 2015)
  59. A Wireless Sensor Network for a Smart LED Lighting control‏‎ (12:02, 27 January 2016)
  60. Bateryless Heart Rate Monitoring‏‎ (15:21, 28 January 2016)
  61. Real-Time Optical Flow Using Neural Networks‏‎ (11:22, 5 February 2016)
  62. Scattering Networks for Scene Labeling‏‎ (11:29, 5 February 2016)
  63. Improving Scene Labeling with Hyperspectral Data‏‎ (11:29, 5 February 2016)
  64. FFT-based Convolutional Network Accelerator‏‎ (11:30, 5 February 2016)
  65. Real-Time Pedestrian Detection For Privacy Enhancement‏‎ (13:17, 5 February 2016)
  66. Autonomous Smart Watches: Toward an ultra low power microphone detector with events classification‏‎ (12:11, 16 February 2016)
  67. Low-power Clock Generation Solutions for 65nm Technology‏‎ (19:37, 3 March 2016)
  68. Final Report‏‎ (10:22, 10 March 2016)
  69. NextGenChannelDec‏‎ (15:31, 13 April 2016)
  70. ASIC Implementation of High-Throughput Next Generation Turbo Decoders‏‎ (11:12, 14 April 2016)
  71. Channel Estimation and Equalization for LTE Advanced‏‎ (11:13, 14 April 2016)
  72. Time Synchronization for 3G Mobile Communications‏‎ (11:22, 14 April 2016)
  73. Signal to Noise Ratio Estimation for 3G standards‏‎ (11:23, 14 April 2016)
  74. High-Throughput Hardware Implementations of Authenticated Encryption Algorithms‏‎ (13:13, 14 April 2016)
  75. GSM Voice Capacity Evolution - VAMOS‏‎ (17:45, 14 April 2016)
  76. 4th Generation Synchronization‏‎ (17:56, 14 April 2016)
  77. Baseband Processor Development for 4G IoT‏‎ (17:58, 14 April 2016)
  78. Beat DigRF‏‎ (17:58, 14 April 2016)
  79. Research‏‎ (19:38, 14 April 2016)
  80. Spatio-Temporal Video Filtering‏‎ (19:40, 14 April 2016)
  81. 3D Turbo Decoder ASIC Realization‏‎ (12:33, 15 April 2016)
  82. Implementing Hibernation on the ARM Cortex M0‏‎ (11:59, 20 June 2016)
  83. Digital Transmitter for Cellular IoT‏‎ (16:41, 17 July 2016)
  84. An FPGA-Based Evaluation Platform for Mobile Communications‏‎ (16:05, 21 July 2016)
  85. Non-binary LDPC Decoder for Deep-Space Optical Communications‏‎ (16:05, 21 July 2016)
  86. Software‏‎ (13:45, 8 August 2016)
  87. Towards Self Sustainable UAVs‏‎ (20:45, 9 August 2016)
  88. Ultra Low Power Conversion Circuit For Batteryless Applications‏‎ (17:46, 10 August 2016)
  89. Libria‏‎ (09:35, 26 August 2016)
  90. Change-based Evaluation of Convolutional Neural Networks‏‎ (18:04, 29 August 2016)
  91. Learning Image Decompression with Convolutional Networks‏‎ (18:16, 29 August 2016)
  92. FPGA System Design for Computer Vision with Convolutional Neural Networks‏‎ (18:17, 29 August 2016)
  93. High-speed Scene Labeling on FPGA‏‎ (18:18, 29 August 2016)
  94. David J. Mack‏‎ (17:41, 31 August 2016)
  95. Eye tracking‏‎ (17:43, 31 August 2016)
  96. Linux Driver for fine-grain and low overhead access to on-chip performance counters‏‎ (15:55, 9 September 2016)
  97. Open Power-On Chip Controller Study and Integration‏‎ (15:57, 9 September 2016)
  98. PVT Dynamic Adaptation in PULPv3‏‎ (15:31, 13 September 2016)
  99. Compressed Sensing vs JPEG‏‎ (10:24, 14 September 2016)
  100. On-chip clock synthesizer design and porting‏‎ (11:20, 14 September 2016)

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