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• Ultra-low power processor design
  ...ionality which will never be used in the target system and it is therefore not necessary to maintain all this functionality. Removing caches, IMMU, DMMU, ..., at least one processor will have to wait(stall) until the memory becomes available. To simulate such a miss in a single core structure, an acknowledge will be
  10 KB (1,669 words) - 19:01, 30 January 2014
• Final Report
  ...a problem, it means that solutions offered in ''related work'' were simply not good enough. Explain what is missing in the related work, and lead into you * Introduction (and Conclusion) are more easy to finish last, do not get stuck at the beginning trying to write a good introduction.
  4 KB (618 words) - 10:22, 10 March 2016
• Efficient Digital Signal Processing in High-Channel-Count High-Frame-Rate 3D Ultrasound Imaging Systems
  ...ime with the same naturalness as the iconic stethoscope. These new systems not only enable new diagnostic possibilities, but also push the limits of the t [[Category:Available]]
  4 KB (614 words) - 20:10, 17 February 2015
• Flexible Electronic Systems and Embedded Epidermal Devices
  ...pment''' of such systems faces a '''number of challenges'''. These include not only material properties per se (e.g., flexibility, stretchability, or bioc ===Available Projects===
  4 KB (444 words) - 12:43, 23 July 2023
• Design and VLSI Implementation of a Constrained-Viterbi Algorithm Equalizer for 3GPP TD-HSPA
  is not feasible due to prohibitive complexity. This is due to the fact that the co
  5 KB (684 words) - 10:43, 6 November 2017
• Weekly Reports
  Please use ASCII text, if needed with embedded figures. Do not send your report as pdf or .docx in attachment. This prevents Prof. Benini * Address your mail to Prof. Benini, do not forget to add your supervisors in CC
  7 KB (1,133 words) - 07:08, 7 October 2023
• Power Optimization in Multipliers
  ...th little hardware overhead and speed penalty. Such techniques however are not compatible with standard-cell technologies. The goal of this project is to [[Category:Available]]
  3 KB (386 words) - 16:23, 30 October 2020
• Low-power chip-to-chip communication network
  ...aller chips (like the ones relevant for our research) as there are usually not enough number of I/O pins to take advantage of parallelization. Most soluti ===Status: Available ===
  3 KB (492 words) - 12:34, 7 November 2017
• Hardware Accelerated Derivative Pricing
  students who have broad interests, not just in hardware, but also in ===Status: Available ===
  3 KB (429 words) - 09:42, 12 October 2017
• Harald Kröll
  ==Available Projects== category = Available
  764 bytes (92 words) - 17:27, 1 November 2017
• CPS Software-Configurable State-Machine
  To save power, this unit will not be a conventional fully synchronously clocked design: the configurable stat ===Status: Available ===
  3 KB (418 words) - 11:24, 10 November 2017
• Successive Interference Cancellation for 3G Downlink
  ...stems, (optimum) joint maximum-likelihood sequence detection is in general not feasible. Instead, power- and area-efficient linear algorithms, such as lin
  2 KB (330 words) - 18:59, 10 February 2015
• Ab-initio Simulation of Strained Thermoelectric Materials
  ===Status: Available === ...ructure calculations and the Boltzmann Transport Equation appreciated, but not required
  3 KB (456 words) - 15:43, 4 September 2019
• Implementation of a 2-D model for Li-ion batteries
  ...ar and wind power will become true alternatives to fossil fuels if they do not need to be consumed instantaneously, but can be stored first and then used ...mid 90's, are computationally very efficient to fulfill this task, but do not capture the shape of the electrode active components. The goal of this proj
  3 KB (431 words) - 15:41, 4 September 2019
• Design and Implementation of an Approximate Floating Point Unit
  ...gy efficient implementation because ''floating point'' (FP)-operations are not always used which means they remain idle for lots of cycles. Sharing FPUs
  3 KB (377 words) - 10:58, 21 February 2018
• A Multiview Synthesis Core in 65 nm CMOS
  ...cement of image pixels allowed to design a hardware architecture that does not require an off-chip memory. The complexity of the chip is 6.75 MGE (includi [[Category:Available]]
  4 KB (524 words) - 15:49, 13 May 2015
• Compressed Sensing Reconstruction on FPGA
  ...he OMP (bottom) hardware architecture utilizing the multipliers (VMU unit) available on today’s FPGA platforms.]] ...ly for applications with real-time requirements, software realizations are not fast enough. We therefore implemented generic high- speed FPGA implementati
  3 KB (389 words) - 18:56, 28 January 2014
• Pirmin Vogel
  ...19, he joined [https://www.lowrisc.org lowRISC C.I.C.], a Cambridge-based, not-for-profit company using collaborative engineering to develop and maintain ==Available Projects==
  1 KB (193 words) - 15:39, 3 March 2020
• Multi-Band Receiver Design for LTE Mobile Communication
  ...are becoming more and more important in our daily life. A mobile phone is not primarily a wireless phone anymore. It is rather a lifestyle device connec
  2 KB (275 words) - 17:47, 29 January 2014
• High Performance Cellular Receivers in Very Advanced CMOS
  ...frequency range. Using one input pin for every frecuency band to cover is not feasible for a transceiver that operates on latest cellular communication s
  2 KB (275 words) - 13:02, 10 March 2015
• Near-Optimal Reduced-Complexity Sequence Detectors for TD-HSPA
  UE. However, this task is not a trivial one in an environment such as that of the TD-HSPA standard (deplo
  2 KB (265 words) - 13:49, 9 February 2015
• IcySoC
  ...ng blocks that were mostly ad-hoc targeting some specific examples and did not consider well-understood complete platforms based on these inexact and extr
  4 KB (568 words) - 12:48, 9 February 2015
• Infrared Wake Up Radio
  ...g order of magnitude less power than in active mode, and this allows to do not waste precious energy. However, it is important to implement mechanisms an ===Status: Available ===
  3 KB (515 words) - 19:55, 9 February 2015
• Sandro Belfanti
  ==Available Projects== There are several projects currently available, which are listed in this section. Most of them can be adapted to a Masters
  2 KB (336 words) - 17:27, 1 November 2017
• Glitches Reduce Listening Time of Your iPod
  ...many years, it hasn't found its way into EDA. Current synthesis tools are not able to report nor optimize glitching. As a result glitching power goes mai [[Category:Available]]
  2 KB (330 words) - 15:59, 14 September 2017
• Improving Scene Labeling with Hyperspectral Data
  ...three spectral bins (red, green, blue), but many more (e.g. 16 or 25) and not necessarily in the visual range of the spectrum. This allows the camera to ...rovide a large number of channels and were very heavy, ultra expensive and not mobile [[http://www.helimetrex.com.au/tetra.html link], [http://www.fluxdat
  6 KB (941 words) - 11:29, 5 February 2016
• Design and Implementation of Digital Spiking Neurons for Ultra-Low-Power In-Cluster Coprocessors
  If you want to work on this project, but you think that you do not match some the required skills, we can give you some preliminary exercise t [[Category:Available]]
  5 KB (784 words) - 14:50, 30 November 2016
• Investigation of the source starvation effect in III-V MOSFET
  ...ation in the source contact of III-V MOSFETs and of determining whether or not source starvation plays a significant role. ===Status: Available ===
  3 KB (331 words) - 15:40, 4 September 2019
• Design study of tunneling transistors based on a core/shell nanowire structures
  ...eld-effect transistors (MOSFETs), the sub-threshold slope (SS) of TFETs is not limited to 60 mV/dec at room temperature, but could theoretically be reduce ===Status: Available ===
  3 KB (357 words) - 15:38, 4 September 2019
• Computation of Phonon Bandstructure in III-V Nanostructures
  ...rm can be treated using Ewald's summation method in bulk structures, it is not clear how to handle it in nanostructures without too much increasing the co ===Status: Available ===
  3 KB (363 words) - 15:37, 4 September 2019
• Investigation of Redox Processes in CBRAM
  ...ntal measurements, but could also be used to predict the behaviour of new, not-yet-fabricated devices. ===Status: Available ===
  4 KB (488 words) - 17:12, 16 September 2021
• Investigation of Metal Diffusion in Oxides for CBRAM Applications
  ...ements, but could also be used to predict the behavior of new, not-yet-fabricated devices. ===Status: Available ===
  3 KB (448 words) - 17:11, 16 September 2021
• Advanced 5G Repetition Combining
  ...y 20 dB. For the so-called PBCH this is especially difficult, since it has not been changed from legacy LTE. While it is transmitted continuously, the dat ===Status: Available ===
  3 KB (345 words) - 10:52, 5 April 2022
• OpenRISC SoC for Sensor Applications
  ...IIS we have started developing our own implementation of the OpenRISC core available from the [http://www.opencores.org Opencores] community. A brand new optimi At the moment, the processor does not have a working interrupt system. We expect this support to be present at th
  4 KB (667 words) - 15:23, 23 December 2016
• Hardware Accelerator for Model Predictive Controller
  ...ny core system. However, the performance of the software implementation is not sufficient to fulfill the real-time requirements of the system. Therefore w ===Status: Available ===
  3 KB (456 words) - 08:35, 20 January 2021
• 4th Generation Synchronization
  in case the transmitter and receiver are not synchronized. Strongly available at all times. Therefore, the BTS transmits synchronization
  2 KB (350 words) - 17:56, 14 April 2016
• Android reliability governor
  Reliability (R(t)) is the probability that a given system does not fail before time t. It is becoming a major concern in modern multiprocessor ===Status: Available ===
  4 KB (573 words) - 17:24, 9 February 2015
• Real-Time Pedestrian Detection For Privacy Enhancement
  ...obstacle when public places are being monitored: real-time surveillance is not allowed in such cases, and stored data can (even for internal use) only be ===Status: Available ===
  3 KB (408 words) - 13:17, 5 February 2016
• Digital Transmitter for Cellular IoT
  ...support before synthesis in order to save silicon area if Evolved EDGE is not required. The transmitter will eventually replace the transmitter in the ex
  3 KB (384 words) - 16:41, 17 July 2016
• Design and Implementation of a Convolutional Neural Network Accelerator ASIC
  ...obstacle when public places are being monitored: real-time surveillance is not allowed in such cases, and stored data can (even for internal use) only be * project report (in digital form; a hard copy also welcome, but not necessary)
  9 KB (1,289 words) - 19:45, 24 March 2015
• Birds Long Term Monitoring With Ultra Low Power Wireless Sensor Node
  ===Status: Available === (''not all need to be met'' by the single candidate)
  4 KB (589 words) - 10:14, 3 August 2018
• Real-Time Stereo to Multiview Conversion
  Today, most commercially available 3D display Ideally, a 3D display system should not require the users to
  3 KB (509 words) - 09:09, 23 October 2015
• Acceleration and Transprecision
  ...ery tight power budget. Without a dedicated accelerator, these tasks would not be feasible. ===Available Projects===
  2 KB (275 words) - 17:05, 24 November 2023
• Modeling FlooNoC in GVSoC (S/M)
  [[Category:Available]] == Status: Available ==
  4 KB (520 words) - 15:15, 4 December 2023
• Ultrafast Medical Ultrasound imaging on a GPU
  ===Status: Available === : First experiences with GPU Programming (CUDA) are beneficial but not required
  3 KB (428 words) - 12:13, 1 August 2018
• Baseband Meets CPU
  [[File:2G_soc.png|thumb|Vision of modem SoC (external power amplifier not shown). The bold interfaces can be implemented during this project.]] File:2G_soc.png|Vision of modem SoC (external power amplifier not shown). The bold interfaces can be implemented during this project.
  7 KB (1,105 words) - 20:02, 26 September 2017
• Real-Time Optical Flow Using Neural Networks
  ...networks is usually to get a large enough, (hand-)labeled dataset. This is not a problem here, since we can take a high-quality algorithm's output as our * Implement the most promissing candidate(s) (or make use of available implementations)
  5 KB (707 words) - 11:22, 5 February 2016
• PULPonFPGA: Lightweight Virtual Memory Support - Software Cache
  ===Status: Not Available === [[Category:Available]]
  5 KB (716 words) - 13:43, 29 November 2019
• Vector Processor for In-Memory Computing
  architectures has already been around for decades, but so far it has not been viable on an industrial scale. Recent developments in process technolo
  3 KB (443 words) - 13:10, 2 November 2015
• FFT-based Convolutional Network Accelerator
  * project report (in digital form; a hard copy also welcome, but not necessary) * two not-yet-published papers by our group on acceleration of ConvNets
  8 KB (1,145 words) - 11:30, 5 February 2016
• High-speed Scene Labeling on FPGA
  * project report (in digital form; a hard copy also welcome, but not necessary) * two not-yet-published papers by our group on acceleration of ConvNets
  8 KB (1,197 words) - 18:18, 29 August 2016
• Time Synchronization for 3G Mobile Communications
  ...e phone and the base station is no trivial task. Initially the mobile does not know anything about the base-station. It does not know when the different frames start, what cells are around and which synch
  3 KB (420 words) - 11:22, 14 April 2016
• Autonomous Sensing For Trains In The IoT Era
  (''not all need to be met'' by the single candidate) ...ioning with operational amplifiers: amplifiers, filters, integrators etc. (not mandatory)
  6 KB (774 words) - 08:36, 23 November 2022
• Switched Capacitor Based Bandgap-Reference
  ...sult in a temperature independent voltage of about 1.2V. Such a voltage is not compliant with modern CMOS processes that have supply voltages below 1V. En [[Category:Available]]
  4 KB (471 words) - 11:13, 3 May 2018
• EvalEDGE: A 2G Cellular Transceiver FMC
  ...1.0. However, it has been superseded by the [[evaLTE]] board, which offers not only 2G but also 3G and 4G transceiver functionality.
  2 KB (289 words) - 17:10, 17 December 2015
• Autonomous Smart Watches: Toward an ultra low power microphone detector with events classification
  ...ect will be implement and evaluate a complete neural network using already available framework to achieve context recognition. The idea behind this project woul ===Status: Available ===
  4 KB (507 words) - 12:11, 16 February 2016
• Low Power Neural Network For Multi Sensors Wearable Devices
  ...g. sampling frequency) sufficient for the particular application, in order not to miss the event. However, the rate of occurrence of the event of interes ===Status: Available ===
  7 KB (895 words) - 17:02, 28 July 2017
• David J. Mack
  ==Available Projects== category = Available
  2 KB (310 words) - 17:41, 31 August 2016
• Improving our Smart Camera System
  * project report (in digital form; a hard copy also welcome, but not necessary) * two not-yet-published papers by our group on acceleration of ConvNets
  8 KB (1,176 words) - 16:26, 30 October 2020
• Eye tracking
  ...n connected to a contact lens made of plaster-of-Paris. Obviously, this is not the most pleasant recording technique since it affects the eye and its move
  1 KB (146 words) - 17:43, 31 August 2016
• Beat DigRF
  ...good candidates for the communication interface. Whenever a power plug is not an option ultra long battery life is a key requirement. And, as the number ...at the institute in the [[stoneEDGE]] project. It combines a commercially available RF IC from ACP AG [1] and Digital Baseband (DBB) developed at the institute
  2 KB (299 words) - 17:58, 14 April 2016
• Kinetic Energy Harvesting For Autonomous Smart Watches
  ===Status: Available === (''not all need to be met'' by the single candidate)
  3 KB (388 words) - 11:06, 12 July 2017
• Ultra-Efficient Visual Classification on Movidius Myriad2
  ...rs and 9 billions of operations on a VGA image. The goal of the project is not only to have this state-of-the-art deep network running on a low-power embe [[Category:Available]]
  4 KB (593 words) - 14:57, 30 November 2016
• Design of State Retentive Flip-Flops
  ...ting is a well-established method to save power in circuit parts currently not in use in a system on chip (SoC). In contrast to clock gating, where the cl ...rator with no relevant information to be retained between two calls, it is not acceptable for an entire processor core idling, for example while waiting f
  2 KB (364 words) - 09:34, 25 July 2017
• Standard Cell Compatible Memory Array Design
  ...hat this project can deliver the most efficient ''small memory'' generator available to us, and beat the performance of what we can achieve with standard SRAM g * Familiarity with transistor level design is a plus, but is not necessary (i.e AIC)
  5 KB (769 words) - 15:54, 23 May 2018
• Learning Image Decompression with Convolutional Networks
  ...ce aspect of this application is that the usually limited training data is not an issue, since randomly acquired images our the internet can be used to tr ===Status: {Available, Reserved, In Progress, Completed}===
  2 KB (285 words) - 18:16, 29 August 2016
• Internet of Things Network Synchronizer
  ...vel lies above the noise level (10 dB SNR or higher). Lower SNR ranges are not interesting for normal communication. With the introduction of EC-GSM-IoT, ...um time to synchronize (successfully decode EC-SCH data) is 2 s. This does not mean that requirements R1a and R1b need to be met after 2 s, it only means
  4 KB (582 words) - 20:00, 26 September 2017
• Covariant Feature Detector on Parallel Ultra Low Power Architecture
  ...]] [[Category:Software]] [[Category:Digital]] [[Category:PULP]] [[Category:Available]] [[Category:Semester Thesis]] [[Category:Dpalossi]] The goal of the project is not only to achieve good performance in term of execution time, but also to fin
  4 KB (628 words) - 16:16, 20 February 2018
• Bateryless Heart Rate Monitoring
  ...city. In some cases, due to very restrictive form factors, batteries might not even be a design option. In these scenarios, small energy harvesters can be ===Status: Available ===
  3 KB (413 words) - 15:21, 28 January 2016
• Change-based Evaluation of Convolutional Neural Networks
  * project report (in digital form; a hard copy also welcome, but not necessary) * two not-yet-published papers by our group on acceleration of ConvNets
  5 KB (747 words) - 18:04, 29 August 2016
• Rethinking our Convolutional Network Accelerator Architecture
  ===Status: Not Available=== [[Category:Digital]] [[Category:FPGA]] [[Category:ASIC]] [[Category:Not available]] [[Category:Semester Thesis]] [[Category:Master Thesis]]
  9 KB (1,263 words) - 18:52, 12 December 2016
• Design of a VLIW processor architecture based on RISC-V
  ...e cores are based on an in-order, 4 stage 32b pipeline. However, RISC-V is not only proposing 32b instructions, but also 16b(so-called compressed instruct
  3 KB (377 words) - 10:25, 5 November 2019
• Minimal Cost RISC-V core
  A simple micro-controller on the other hand, does not need the full support of all the extensions. Instead minimal hardware costs
  3 KB (384 words) - 17:24, 21 August 2019
• Matthias Korb
  ==Available Projects== category = Available
  698 bytes (85 words) - 14:17, 5 April 2022
• Fast Wakeup From Deep Sleep State
  Most of the applications do not need an always-on system and often implement aggressive duty cycling to min ===Status: Available ===
  2 KB (236 words) - 08:35, 20 January 2021
• Implementation of a NB-IoT Positioning System
  ...mpletely fails. Furthermore, GNSS receivers are very power-hungry which is not suitable for most of IoT applications. The 3GPP consortium responds to this ...orithm. The next task will be the integration of the UE algorithm into the available NB-IoT-baseband implementation. This step includes a hardware-software co-d
  4 KB (555 words) - 16:36, 23 May 2018
• Design of a Fused Multiply Add Floating Point Unit
  ...gy efficient implementation because ''floating point'' (FP)-operations are not always used which means they remain idle for lots of cycles. Sharing FPUs ===Status: Available ===
  2 KB (346 words) - 10:26, 5 November 2019
• PULPonFPGA: Lightweight Virtual Memory Support - Page Table Walker
  : Experience with Linux kernel-level driver development is of advantage, but not strictly required. [[Category:Available]]
  5 KB (712 words) - 17:57, 7 November 2017
• PULPonFPGA: Lightweight Virtual Memory Support - Physically Contiguous Memory
  ===Status: Not Available === ...development and GNU Compiler Collection (GCC) hacking is of advantage, but not strictly required.
  6 KB (866 words) - 13:43, 29 November 2019
• Self-Learning Drones based on Neural Networks
  * project report (in digital form; a hard copy also welcome, but not necessary)
  6 KB (828 words) - 16:26, 20 February 2018
• Towards The Integration of E-skin into Prosthetic Devices
  ===Status: Available === (''not all need to be met'' by the single candidate)
  4 KB (631 words) - 11:39, 21 July 2017
• A Wearable System To Control Phone And Electronic Device Without Hands
  ===Status: Available === (''not all need to be met'' by the single candidate)
  5 KB (669 words) - 17:22, 31 January 2018
• Passive and Self Sustaining Receivers For On and Intra Body Communication For Wearable Sensors Networks
  ...devices are using today a Bluetooth interface to communicate, but this is not the optimal solution as also the new generation of low energy bluetooth are ===Status: Available ===
  4 KB (576 words) - 16:58, 28 July 2017
• LightProbe - Frontend Firmware and Control Side Channel
  ...orms, which are later emitted into the tissue for imaging. The special ADC not only converts the received echos from the analog domain into the digital do Configuring and controlling such a frontend properly is not a trivial task.
  3 KB (458 words) - 20:51, 12 November 2020
• Learning Image Compression with Convolutional Networks
  ...ce aspect of this application is that the usually limited training data is not an issue, since randomly acquired images our the internet can be used to tr ===Status: {Available, Reserved, In Progress, Completed}===
  3 KB (362 words) - 16:25, 30 October 2020
• Bringing XNOR-nets (ConvNets) to Silicon
  * project report (in digital form; a hard copy also welcome, but not necessary) [[Category:Available]]
  10 KB (1,357 words) - 16:25, 30 October 2020
• Linux Driver for fine-grain and low overhead access to on-chip performance counters
  [[Category:Software]] [[Category:Available]] [[Category:Hot]] [[Category:Semester Thesis]] [[Category:2016]] [[Categor ...ethods. However, this is only used to interface with external monitors and not with the internal per-core architectural performance counters.
  3 KB (417 words) - 15:55, 9 September 2016
• Ultra Low-Power Oscillator
  ...often achieved by heavy duty-cycling of operation, i.e. everything that is not needed for a particular operating state is switched off. This puts a big pr ===Status: Available ===
  2 KB (368 words) - 18:58, 19 December 2016
• High performance continous-time Delta-Sigma ADC for biomedical applications
  ...ome small and wearable with the requirement of low power consumption while not degrading performance. As the frequency range of physiological signals is l [[Category:Available]]
  3 KB (375 words) - 17:46, 2 May 2017
• High performance continuous-time Delta-Sigma ADC for magnetic resonance imaging
  ...nuous-time, RC based structures, because they offer implicit filtering, do not need as much buffering in front and can be realized with less power consump [[Category:Available]]
  3 KB (358 words) - 11:40, 20 August 2021
• Radio Signal Direction Detection For Smart Glasses For Augmented Reality Applications
  is resource intensive and may not work indoor. An innovative approach theoretically, does not necessitate of the same amount of data and
  4 KB (609 words) - 11:38, 21 July 2017
• High Power Efficient Digitally Controlled Oscillator Design for Cellular IOT
  ...wer) is getting stronger than ever. Locating at the heart of PLL, VCO does not only determine the phase noise performance of PLL (especially far out part) [[Category:Available]]
  3 KB (428 words) - 11:45, 20 August 2021
• Nanoscale Hybrid III-V Plasmonic Laser for Low-Power Photonic ICs
  ..., optics and numerical simulation. Knowledge with plasmonics is a plus but not required. [[Category:Available]]
  2 KB (323 words) - 17:09, 16 September 2021
• Interfacing PULP with a Brain-Inspired Ultra-Low Power Spiking Cochlea
  ...l have to be interfaced with the PULP interface subsystem using one of the available sensor interfaces, e.g. SPI or I2S. The bulk of the project will therefore If you want to work on this project, but you think that you do not match some the required skills, we can give you some preliminary exercise t
  9 KB (1,427 words) - 18:36, 5 September 2019
• LightProbe - Implementation of compressed-sensing algorithms
  ...important diagnostic procedures in modern medicine. Being non-invasive and not emitting any potentially harmful radiation (like X-Rays), ===Status: Available ===
  4 KB (521 words) - 10:37, 26 October 2021
• LightProbe - Thermal-Power aware on-head Beamforming
  ...ct with human skin. Thus it must be able to throttle it's performance when not needed, e.g. , a 30 fps image is sufficient to find the right placement of ===Status: Available ===
  3 KB (374 words) - 20:50, 12 November 2020
• Deep Learning Projects
  ...data contexts than, for instance, support vector machines (SVMs). DNNs do not use branching instructions, making them predictable programs and allowing t ...nimize the number of effective arithmetic operations (i.e., the operations not involving zero-valued operands, which must be actually executed). '''Hardwa
  18 KB (2,473 words) - 19:29, 19 February 2024
• Deep-Learning Based Phoneme Recognition from a Ultra-Low Power Spiking Cochlea
  If you want to work on this project, but you think that you do not match some the required skills, we can give you some preliminary exercise t ===Status: Available ===
  6 KB (920 words) - 16:33, 3 October 2019
• Single-Bit-Synapse Spiking Neural System-on-Chip
  If you want to work on this project, but you think that you do not match some the required skills, we can give you some preliminary exercise t ===Status: Available ===
  7 KB (1,000 words) - 12:22, 13 January 2017
• Tiny CNNs for Ultra-Efficient Object Detection on PULP
  ...NNs with object detection accuracy results in the order of the best models available have recently been proposed [Iandola2016] that would be a good match for th ...[[http://asic.ethz.ch/2015/Fulmine.html]]) board and an attached camera is available. The project will consist of several subtasks:
  5 KB (794 words) - 13:19, 13 January 2017

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