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Showing below up to 100 results in range #501 to #600.

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  1. (hist) ‎Hyper Meccano: Acceleration of Hyperdimensional Computing ‎[3,434 bytes]
  2. (hist) ‎Processing of 3D Micro-tomography data for Lithium Ion Batteries ‎[3,438 bytes]
  3. (hist) ‎Infrared Wake Up Radio ‎[3,454 bytes]
  4. (hist) ‎Routing 1000s of wires in Network-on-Chips (1-2S/M) ‎[3,457 bytes]
  5. (hist) ‎Exploration and Hardware Acceleration of Intra-Layer Mixed-Precision QNNs ‎[3,470 bytes]
  6. (hist) ‎Zephyr RTOS on PULP ‎[3,478 bytes]
  7. (hist) ‎Structural Health Monitoring (SHM) System (1-2S/M) ‎[3,478 bytes]
  8. (hist) ‎Resilient Brain-Inspired Hyperdimensional Computing Architectures ‎[3,480 bytes]
  9. (hist) ‎Wearables in Fashion ‎[3,486 bytes]
  10. (hist) ‎Open Power-On Chip Controller Study and Integration ‎[3,490 bytes]
  11. (hist) ‎FPGA-based Testbed Implementation of an Extended-Coverage Point-to-Point Communication Link for the Internet of Things ‎[3,491 bytes]
  12. (hist) ‎SCMI Support for Power Controller Subsystem ‎[3,507 bytes]
  13. (hist) ‎Real-Time Stereo to Multiview Conversion ‎[3,509 bytes]
  14. (hist) ‎Neural Recording Interface and Spike Sorting Algorithm ‎[3,516 bytes]
  15. (hist) ‎Runtime partitioning of L1 memory in Mempool (M) ‎[3,522 bytes]
  16. (hist) ‎Gomeza old project4 ‎[3,523 bytes]
  17. (hist) ‎Indoor Positioning with Bluetooth ‎[3,531 bytes]
  18. (hist) ‎Turbo Equalization for Cellular IoT ‎[3,536 bytes]
  19. (hist) ‎All the flavours of FFT on MemPool (1-2S/B) ‎[3,536 bytes]
  20. (hist) ‎Ultra Low Power Conversion Circuit For Batteryless Applications ‎[3,549 bytes]
  21. (hist) ‎FFT HDL Code Generator for Multi-Antenna mmWave Communication ‎[3,553 bytes]
  22. (hist) ‎Big Data Analytics Benchmarks for Ara ‎[3,556 bytes]
  23. (hist) ‎Autonomous Mapping with Nano-Drones UWB and Novel Depth Sensors ‎[3,559 bytes]
  24. (hist) ‎ASIC Implementation of High-Throughput Next Generation Turbo Decoders ‎[3,562 bytes]
  25. (hist) ‎Wearables for Sports and Life Enhancement ‎[3,562 bytes]
  26. (hist) ‎Hardware/software co-programming on the Parallella platform ‎[3,565 bytes]
  27. (hist) ‎NeuroSoC RISC-V Component (M/1-2S) ‎[3,567 bytes]
  28. (hist) ‎Efficient Banded Matrix Multiplication for Quantum Transport Simulations ‎[3,572 bytes]
  29. (hist) ‎3D Matrix Multiplication Unit for ITA (1S) ‎[3,582 bytes]
  30. (hist) ‎Desing and Implementation Of Long Lasting Key Finder With Bleetooth Low Energy ‎[3,597 bytes]
  31. (hist) ‎Characterization of the susceptibility to cosmic radiation of wide bandgap power devices by radioactive sources and at cryogenic temperatures ‎[3,619 bytes]
  32. (hist) ‎Writing a Hero runtime for EPAC (1-3S/B) ‎[3,620 bytes]
  33. (hist) ‎Modular Distributed Data Collection Platform ‎[3,622 bytes]
  34. (hist) ‎Analysis and Design of Power Efficient RF/ mm-Wave LC-tank Oscillator in 28nm for 5G communication applications ‎[3,628 bytes]
  35. (hist) ‎Machine Learning Assisted Direct Synthesis of Passive Networks ‎[3,635 bytes]
  36. (hist) ‎Flexible Electronic Systems and Embedded Epidermal Devices ‎[3,636 bytes]
  37. (hist) ‎Air Quality Prediction in Office Rooms (1-2S/M) ‎[3,662 bytes]
  38. (hist) ‎Investigation of Redox Processes in CBRAM ‎[3,664 bytes]
  39. (hist) ‎Design of Charge-Pump PLL in 22nm for 5G communication applications ‎[3,666 bytes]
  40. (hist) ‎Switched Capacitor Based Bandgap-Reference ‎[3,667 bytes]
  41. (hist) ‎A Novel Execution Scheme for Ultra-tiny CNNs Aboard Nano-UAVs ‎[3,668 bytes]
  42. (hist) ‎Realtime Gaze Tracking on Siracusa ‎[3,669 bytes]
  43. (hist) ‎Adversarial Attacks Against Deep Neural Networks In Wearable Cameras ‎[3,681 bytes]
  44. (hist) ‎Freedom from Interference in Heterogeneous COTS SoCs ‎[3,689 bytes]
  45. (hist) ‎In-ear EEG signal acquisition ‎[3,696 bytes]
  46. (hist) ‎Sub-Noise Floor Channel Tracking ‎[3,697 bytes]
  47. (hist) ‎LightProbe - Implementation of compressed-sensing algorithms ‎[3,700 bytes]
  48. (hist) ‎GPT on the edge ‎[3,702 bytes]
  49. (hist) ‎Template ‎[3,720 bytes]
  50. (hist) ‎Wearable Smart Camera With Deep Learning Algorithms For Automatic Detecion ‎[3,751 bytes]
  51. (hist) ‎Final Report ‎[3,757 bytes]
  52. (hist) ‎Event-based navigation on autonomous nano-drones ‎[3,759 bytes]
  53. (hist) ‎High-throughput Embedded System For Neurotechnology in collaboration with INI ‎[3,763 bytes]
  54. (hist) ‎High Speed FPGA Trigger Logic for Particle Physics Experiments ‎[3,768 bytes]
  55. (hist) ‎Efficient Implementation of an Active-Set QP Solver for FPGAs ‎[3,774 bytes]
  56. (hist) ‎Design and Exploitation of a Test-Bench for Non-Destructive Characterization of the Susceptibility of Silicon Carbide (SiC) Power Devices to Cosmic Radiation ‎[3,776 bytes]
  57. (hist) ‎Streaming Layer Normalization in ITA (M/1-2S) ‎[3,785 bytes]
  58. (hist) ‎Real-time View Synthesis using Image Domain Warping ‎[3,792 bytes]
  59. (hist) ‎Design Of A Biomarker Assay Based On Responsive Magnetic Nanoparticles ‎[3,795 bytes]
  60. (hist) ‎Autonomous Smart Watches: Toward an ultra low power microphone detector with events classification ‎[3,798 bytes]
  61. (hist) ‎Waterflow Monitoring with Doppler Ultrasound (1S) ‎[3,805 bytes]
  62. (hist) ‎Non-blocking Algorithms in Real-Time Operating Systems ‎[3,820 bytes]
  63. (hist) ‎Low Precision Ara for ML ‎[3,826 bytes]
  64. (hist) ‎Object Detection and Tracking on the Edge ‎[3,829 bytes]
  65. (hist) ‎Development of a fingertip blood pressure sensor ‎[3,837 bytes]
  66. (hist) ‎Real-Time Embedded Systems ‎[3,849 bytes]
  67. (hist) ‎Implementation of the RISC-V Bit Manipulation (RVB) extensions for our RI5CY core ‎[3,856 bytes]
  68. (hist) ‎SmartRing ‎[3,866 bytes]
  69. (hist) ‎RVfplib ‎[3,867 bytes]
  70. (hist) ‎Implementing Configurable Dual-Core Redundancy ‎[3,867 bytes]
  71. (hist) ‎Time and Frequency Synchronization in LTE Cat-0 Devices ‎[3,870 bytes]
  72. (hist) ‎Energy-Efficient Brain-Inspired Hyperdimensional Computing ‎[3,880 bytes]
  73. (hist) ‎Completed ‎[3,883 bytes]
  74. (hist) ‎A Recurrent Neural Network Speech Recognition Chip ‎[3,884 bytes]
  75. (hist) ‎PREM Intervals and Loop Tiling ‎[3,888 bytes]
  76. (hist) ‎A Multiview Synthesis Core in 65 nm CMOS ‎[3,896 bytes]
  77. (hist) ‎PULP’s CLIC extensions for fast interrupt handling ‎[3,953 bytes]
  78. (hist) ‎Low Power One bit Microphone for Acoustic Imaging Using A Parallel Processor ‎[3,967 bytes]
  79. (hist) ‎Finite element modeling of electrochemical random access memory ‎[3,967 bytes]
  80. (hist) ‎Bandwidth Efficient NEureka ‎[3,968 bytes]
  81. (hist) ‎Design of a CAN Interface to Enable Reliable Sensors-to-Processors Communication for Automotive-oriented Embedded Applications (1M) ‎[3,975 bytes]
  82. (hist) ‎Android reliability governor ‎[3,997 bytes]
  83. (hist) ‎Intelligent Disaster Early-Warning System (1-2S/M) ‎[3,999 bytes]
  84. (hist) ‎Unconventional phase change memory device concepts for in-memory and neuromorphic computin ‎[4,001 bytes]
  85. (hist) ‎Design of an on-field adaptable pulse-processing unit for semicondutor radiation detectors ‎[4,002 bytes]
  86. (hist) ‎Hardware/software codesign neural decoding algorithm for “neural dust” ‎[4,005 bytes]
  87. (hist) ‎Smart Agriculture System (1-2S) ‎[4,013 bytes]
  88. (hist) ‎Implementation of the RISC-V Bit Manipulation (RVB) extensions for our RISC-V core ‎[4,019 bytes]
  89. (hist) ‎Software-Defined Paging in the Snitch Cluster (2-3S) ‎[4,036 bytes]
  90. (hist) ‎Design of a Low Power Smart Sensing Multi-modal Vision Platform ‎[4,069 bytes]
  91. (hist) ‎IcySoC ‎[4,070 bytes]
  92. (hist) ‎Optimal System Duty Cycling for a Mobile Health Platform ‎[4,070 bytes]
  93. (hist) ‎Advanced Physical Design: Reinforcement Learning for Macro Placement and Mix-Placer (B/1-2S) ‎[4,090 bytes]
  94. (hist) ‎Modeling FlooNoC in GVSoC (S/M) ‎[4,093 bytes]
  95. (hist) ‎Internet of Things Network Synchronizer ‎[4,097 bytes]
  96. (hist) ‎Ultra Low Power Wake Up Radio for Wireless Sensor Network ‎[4,116 bytes]
  97. (hist) ‎Passive and Self Sustaining Receivers For On and Intra Body Communication For Wearable Sensors Networks ‎[4,132 bytes]
  98. (hist) ‎Efficient Execution of Transformers in RISC-V Vector Machines with Custom HW acceleration (M) ‎[4,135 bytes]
  99. (hist) ‎New RVV 1.0 Vector Instructions for Ara ‎[4,140 bytes]
  100. (hist) ‎Forward error-correction ASIC using GRAND ‎[4,141 bytes]

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