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From iis-projects
Showing below up to 100 results in range #251 to #350.
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- (hist) A Waypoint-based Navigation System for Nano-Size UAVs in GPS-denied Environments [4,518 bytes]
- (hist) Event-Driven Convolutional Neural Network Modular Accelerator [4,511 bytes]
- (hist) IP-Based SoC Generation and Configuration (1-3S/B) [4,509 bytes]
- (hist) Low-Complexity MIMO Detection [4,502 bytes]
- (hist) Characterization techniques for silicon photonics-Lumiphase [4,501 bytes]
- (hist) Low Resolution Neural Networks [4,495 bytes]
- (hist) Radio Signal Direction Detection For Smart Glasses For Augmented Reality Applications [4,486 bytes]
- (hist) Softmax for Transformers (M/1-2S) [4,481 bytes]
- (hist) Embedded Artificial Intelligence:Systems And Applications [4,477 bytes]
- (hist) Wearables for Sports and Fitness Tracking [4,473 bytes]
- (hist) Design space exploration of InP Heterojunction Bipolar Transistors (DHBTs) [4,457 bytes]
- (hist) Covariant Feature Detector on Parallel Ultra Low Power Architecture [4,449 bytes]
- (hist) PULPonFPGA: Lightweight Virtual Memory Support - Coherency Extensions [4,449 bytes]
- (hist) Spiking Neural Network for Autonomous Navigation [4,446 bytes]
- (hist) Integrating Hardware Accelerators into Snitch (1S) [4,435 bytes]
- (hist) NAND Flash Open Research Platform [4,406 bytes]
- (hist) Real-Time ECG Contractions Classification [4,389 bytes]
- (hist) Data Augmentation Techniques in Biosignal Classification [4,358 bytes]
- (hist) Zero Power Touch Sensor and Reciever For Body Communication [4,357 bytes]
- (hist) System Emulation for AR and VR devices [4,347 bytes]
- (hist) Extend the RI5CY core with priviledge extensions [4,337 bytes]
- (hist) Flexfloat DL Training Framework [4,334 bytes]
- (hist) Integrated silicon photonic structures [4,327 bytes]
- (hist) Low Latency Brain-Machine Interfaces [4,326 bytes]
- (hist) Integrated silicon photonic structures-Lumiphase [4,317 bytes]
- (hist) Low-power time synchronization for IoT applications [4,316 bytes]
- (hist) Probabilistic training algorithms for quantized neural networks [4,315 bytes]
- (hist) Ultra-Efficient Visual Classification on Movidius Myriad2 [4,313 bytes]
- (hist) Efficient Digital Signal Processing in High-Channel-Count High-Frame-Rate 3D Ultrasound Imaging Systems [4,311 bytes]
- (hist) Optogenetics And Game Theory Applied To Small Side Bird Using Smart Sensing [4,310 bytes]
- (hist) ASIC implementation of an interpolation-based wideband massive MIMO detector [4,308 bytes]
- (hist) Network-off-Chip (M) [4,302 bytes]
- (hist) Autonomous Obstacle Avoidance with Nano-Drones and Novel Depth Sensors [4,300 bytes]
- (hist) Ultra-wideband Concurrent Ranging [4,295 bytes]
- (hist) OTDOA Positioning for LTE Cat-M [4,289 bytes]
- (hist) Ara: Update PULP's Vector Processor with the recent RISC-V Vector Extension Development [4,285 bytes]
- (hist) PULPonFPGA: Lightweight Virtual Memory Support - Multi-Level TLB [4,280 bytes]
- (hist) Multi-Modal Environmental Sensing With GAP9 (1-2S) [4,267 bytes]
- (hist) A computational memory unit using phase-change memory devices [4,257 bytes]
- (hist) Birds Long Term Monitoring With Ultra Low Power Wireless Sensor Node [4,251 bytes]
- (hist) Implementation of a NB-IoT Positioning System [4,245 bytes]
- (hist) Deep Learning-based Global Local Planner for Autonomous Nano-drones [4,243 bytes]
- (hist) Physical Implementation of ITA (2S) [4,240 bytes]
- (hist) Spectrometry for Environmental Monitoring (1-2S/M) [4,237 bytes]
- (hist) Subject specific embeddings for transfer learning in brain-computer interfaces [4,230 bytes]
- (hist) Design of a High-performance Hybrid PTZ for Multimodal Vision Systems [4,220 bytes]
- (hist) Improved Collision Avoidance for Nano-drones [4,218 bytes]
- (hist) A Unified Compute Kernel Library for Snitch (1-2S) [4,218 bytes]
- (hist) Creating a HDMI Video Interface for PULP [4,212 bytes]
- (hist) EEG artifact detection with machine learning [4,211 bytes]
- (hist) Efficient Memory Stream Handling in RISC-V-based Systems (M/1-2S) [4,183 bytes]
- (hist) Physics is looking for PULP [4,170 bytes]
- (hist) Scattering Networks for Scene Labeling [4,163 bytes]
- (hist) A Wireless Sensor Network for a Smart Building Monitor and Control [4,148 bytes]
- (hist) Forward error-correction ASIC using GRAND [4,141 bytes]
- (hist) New RVV 1.0 Vector Instructions for Ara [4,140 bytes]
- (hist) Efficient Execution of Transformers in RISC-V Vector Machines with Custom HW acceleration (M) [4,135 bytes]
- (hist) Passive and Self Sustaining Receivers For On and Intra Body Communication For Wearable Sensors Networks [4,132 bytes]
- (hist) Ultra Low Power Wake Up Radio for Wireless Sensor Network [4,116 bytes]
- (hist) Internet of Things Network Synchronizer [4,097 bytes]
- (hist) Modeling FlooNoC in GVSoC (S/M) [4,093 bytes]
- (hist) Advanced Physical Design: Reinforcement Learning for Macro Placement and Mix-Placer (B/1-2S) [4,090 bytes]
- (hist) Optimal System Duty Cycling for a Mobile Health Platform [4,070 bytes]
- (hist) IcySoC [4,070 bytes]
- (hist) Design of a Low Power Smart Sensing Multi-modal Vision Platform [4,069 bytes]
- (hist) Software-Defined Paging in the Snitch Cluster (2-3S) [4,036 bytes]
- (hist) Implementation of the RISC-V Bit Manipulation (RVB) extensions for our RISC-V core [4,019 bytes]
- (hist) Smart Agriculture System (1-2S) [4,013 bytes]
- (hist) Hardware/software codesign neural decoding algorithm for “neural dust” [4,005 bytes]
- (hist) Design of an on-field adaptable pulse-processing unit for semicondutor radiation detectors [4,002 bytes]
- (hist) Unconventional phase change memory device concepts for in-memory and neuromorphic computin [4,001 bytes]
- (hist) Intelligent Disaster Early-Warning System (1-2S/M) [3,999 bytes]
- (hist) Android reliability governor [3,997 bytes]
- (hist) Design of a CAN Interface to Enable Reliable Sensors-to-Processors Communication for Automotive-oriented Embedded Applications (1M) [3,975 bytes]
- (hist) Bandwidth Efficient NEureka [3,968 bytes]
- (hist) Finite element modeling of electrochemical random access memory [3,967 bytes]
- (hist) Low Power One bit Microphone for Acoustic Imaging Using A Parallel Processor [3,967 bytes]
- (hist) PULP’s CLIC extensions for fast interrupt handling [3,953 bytes]
- (hist) A Multiview Synthesis Core in 65 nm CMOS [3,896 bytes]
- (hist) PREM Intervals and Loop Tiling [3,888 bytes]
- (hist) A Recurrent Neural Network Speech Recognition Chip [3,884 bytes]
- (hist) Completed [3,883 bytes]
- (hist) Energy-Efficient Brain-Inspired Hyperdimensional Computing [3,880 bytes]
- (hist) Time and Frequency Synchronization in LTE Cat-0 Devices [3,870 bytes]
- (hist) Implementing Configurable Dual-Core Redundancy [3,867 bytes]
- (hist) RVfplib [3,867 bytes]
- (hist) SmartRing [3,866 bytes]
- (hist) Implementation of the RISC-V Bit Manipulation (RVB) extensions for our RI5CY core [3,856 bytes]
- (hist) Real-Time Embedded Systems [3,849 bytes]
- (hist) Development of a fingertip blood pressure sensor [3,837 bytes]
- (hist) Object Detection and Tracking on the Edge [3,829 bytes]
- (hist) Low Precision Ara for ML [3,826 bytes]
- (hist) Non-blocking Algorithms in Real-Time Operating Systems [3,820 bytes]
- (hist) Waterflow Monitoring with Doppler Ultrasound (1S) [3,805 bytes]
- (hist) Autonomous Smart Watches: Toward an ultra low power microphone detector with events classification [3,798 bytes]
- (hist) Design Of A Biomarker Assay Based On Responsive Magnetic Nanoparticles [3,795 bytes]
- (hist) Real-time View Synthesis using Image Domain Warping [3,792 bytes]
- (hist) Streaming Layer Normalization in ITA (M/1-2S) [3,785 bytes]
- (hist) Design and Exploitation of a Test-Bench for Non-Destructive Characterization of the Susceptibility of Silicon Carbide (SiC) Power Devices to Cosmic Radiation [3,776 bytes]
- (hist) Efficient Implementation of an Active-Set QP Solver for FPGAs [3,774 bytes]