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Showing below up to 345 results in range #551 to #895.
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- Low-power Temperature-insensitive Timer (11:06, 21 February 2022)
- Ultrasound (16:37, 23 February 2022)
- Autonomous Obstacle Avoidance with Nano-Drones and Novel Depth Sensors (14:07, 10 March 2022)
- Mauro Salomon (10:47, 5 April 2022)
- Next Generation Synchronization Signals (10:51, 5 April 2022)
- Advanced 5G Repetition Combining (10:52, 5 April 2022)
- Matthias Korb (14:17, 5 April 2022)
- VLSI Implementation Polar Decoder using High Level Synthesis (14:17, 5 April 2022)
- A Novel Execution Scheme for Ultra-tiny CNNs Aboard Nano-UAVs (14:33, 17 May 2022)
- Low-Power Time Synchronization for IoT Applications (13:34, 25 May 2022)
- GRAND Hardware Implementation (14:36, 25 May 2022)
- Forward error-correction ASIC using GRAND (18:16, 27 May 2022)
- Low-Complexity MIMO Detection (13:54, 30 May 2022)
- Theory, Algorithms, and Hardware for Beyond 5G (17:24, 30 May 2022)
- Quantum Transport Modeling of Interband Cascade Lasers (ICL) (10:19, 31 May 2022)
- Energy Efficient Autonomous UAVs (15:02, 13 June 2022)
- Low-power time synchronization for IoT applications (10:55, 16 June 2022)
- Hypervisor Extension for Ariane (M) (08:49, 21 June 2022)
- Watchdog Timer for PULP (08:49, 21 June 2022)
- Triple-Core PULPissimo (08:49, 21 June 2022)
- Adding Linux Support to our DMA Engine (1-2S/B) (12:12, 21 June 2022)
- Enhancing our DMA Engine with Vector Processing Capabilities (1-2S/B) (12:13, 21 June 2022)
- Implementation of a Small and Energy-Efficient RISC-V-based Vector Accelerator (1M) (10:00, 30 June 2022)
- Analysis of Low-Power Wide Area Network Technologies for the Internet of Things (15:34, 11 July 2022)
- Development of a fingertip blood pressure sensor (16:56, 12 July 2022)
- Enabling Standalone Operation for a Mobile Health Platform (16:57, 12 July 2022)
- Design and Implementation of a multi-mode multi-master I2C peripheral (16:57, 12 July 2022)
- Optimal System Duty Cycling for a Mobile Health Platform (16:57, 12 July 2022)
- Android Software Design (16:57, 12 July 2022)
- Cell-Free mmWave Massive MIMO Communication (21:34, 13 July 2022)
- Event-based navigation on autonomous nano-drones (18:25, 26 July 2022)
- Huawei Research (11:11, 1 August 2022)
- Efficient TNN Inference on PULP Systems (15:14, 4 August 2022)
- Knowledge Distillation for Embedded Machine Learning (15:14, 4 August 2022)
- Evaluating An Ultra low Power Vision Node (15:16, 4 August 2022)
- Integration Of A Smart Vision System (15:36, 4 August 2022)
- PULP’s CLIC extensions for fast interrupt handling (15:06, 5 August 2022)
- PULP Freertos with LLVM (16:51, 5 August 2022)
- RVfplib (13:25, 12 August 2022)
- An Efficient Compiler Backend for Snitch (1S/B) (14:34, 15 August 2022)
- A Unified Compute Kernel Library for Snitch (1-2S) (09:49, 17 August 2022)
- Designing a Power Management Unit for PULP SoCs (11:22, 18 August 2022)
- PULP (10:09, 19 August 2022)
- Efficient Synchronization of Manycore Systems (M/1S) (12:08, 29 August 2022)
- Integrating Hardware Accelerators into Snitch (1S) (13:57, 7 September 2022)
- On-Device Training Sparse Sub-Tensor Update Scheme Optimization for CNN-based tasks (12:12, 14 September 2022)
- Streaming Integer Extensions for Snitch (M/1-2S) (14:19, 15 September 2022)
- Machine Learning for extracting Muscle features using Ultrasound 2 (16:56, 16 September 2022)
- Ultrasound Low power WiFi with IMX7 (16:56, 16 September 2022)
- Ultrasound signal processing acceleration with CUDA (16:57, 16 September 2022)
- Minimum Variance Beamforming for Wearable Ultrasound Probes (16:57, 16 September 2022)
- Machine Learning for extracting Muscle features using Ultrasound (16:57, 16 September 2022)
- Compression of Ultrasound data on FPGA (16:57, 16 September 2022)
- LightProbe - 200G Remote DMA for GPU FPGA Data Transfers (16:58, 16 September 2022)
- Time Gain Compensation for Ultrasound Imaging (16:58, 16 September 2022)
- LightProbe - WIFI extension (PCB) (16:59, 16 September 2022)
- Alias-Free Oscillator Synchronization for Arbitrary Waveforms (09:48, 5 October 2022)
- Aliasing-Free Wavetable Music Synthesizer (18:09, 9 October 2022)
- Test project (18:15, 11 October 2022)
- Benchmarking a heterogeneous 217-core MPSoC on HPC applications (11:46, 12 October 2022)
- Benchmarking a heterogeneous 217-core MPSoC on HPC applications (M/1-3S)) (11:48, 12 October 2022)
- SCMI Support for Power Controller Subsystem (13:55, 12 October 2022)
- A Post-Simulation Trace-Based RISC-V GDB Debugging Server (01:02, 13 October 2022)
- Extended Verification for Ara (14:19, 18 October 2022)
- Implementing DSP Instructions in Banshee (1S) (13:31, 27 October 2022)
- Counter-based Fast Power Estimation using FPGAs (M/1-3S) (13:51, 27 October 2022)
- Towards a Technology-independent and Synthesizable AXI4 Performance Monitoring and Throttling Unit (1-2S) (13:58, 27 October 2022)
- Flexfloat DL Training Framework (10:13, 2 November 2022)
- Approximate Matrix Multiplication based Hardware Accelerator to achieve the next 10x in Energy Efficiency: Training Strategy And Algorithmic optimizations (16:32, 3 November 2022)
- Approximate Matrix Multiplication based Hardware Accelerator to achieve the next 10x in Energy Efficiency: Full System Intregration (16:50, 3 November 2022)
- Augmenting Our IPs with AXI Stream Extensions (M/1-2S) (16:13, 6 November 2022)
- Efficient Memory Stream Handling in RISC-V-based Systems (M/1-2S) (16:14, 6 November 2022)
- All the flavours of FFT on MemPool (1-2S/B) (18:54, 9 November 2022)
- Molecular Binding Kinetics Modelling of NO2 on Graphene/hBN Heterostructure (18:47, 10 November 2022)
- Feature Extraction for Speech Recognition (1S) (11:00, 14 November 2022)
- Online Learning of User Features (1S) (11:00, 14 November 2022)
- CLIC for the CVA6 (10:53, 15 November 2022)
- Coherence-Capable Write-Back L1 Data Cache for Ariane (M) (16:32, 15 November 2022)
- Implementation of a Coherent Application-Class Multicore System (1-2S) (16:41, 15 November 2022)
- Design of a Reconfigurable Vector Processor Cluster for Area Efficient Radar Processing (1M) (20:42, 22 November 2022)
- Autonomous Sensing For Trains In The IoT Era (08:36, 23 November 2022)
- Outdoor Precision Object Tracking for Rockfall Experiments (08:37, 23 November 2022)
- Wearables in Fashion (08:38, 23 November 2022)
- Biomedical System on Chips (19:23, 23 November 2022)
- Exploration and Hardware Acceleration of Intra-Layer Mixed-Precision QNNs (22:15, 23 November 2022)
- Stefan Lippuner (10:47, 24 November 2022)
- Modular Frequency-Modulation (FM) Music Synthesizer (12:35, 28 November 2022)
- Versatile HW SW Digital PHY for inter chip communication (20:37, 15 December 2022)
- Analog Compute-in-Memory Accelerator Interface and Integration (18:02, 16 December 2022)
- Novel Metastability Mitigation Technique (18:03, 16 December 2022)
- Precise Ultra-low-power Timer (18:04, 16 December 2022)
- Energy Efficient Circuits and IoT Systems Group (15:19, 19 December 2022)
- Design of MEMs Sensor Interface (15:19, 19 December 2022)
- Hardware/software codesign neural decoding algorithm for “neural dust” (16:16, 9 January 2023)
- Christoph Leitner (01:54, 12 January 2023)
- Bluetooth Low Energy receiver in 65nm CMOS (12:24, 12 January 2023)
- Bridging QuantLab with LPDNN (19:36, 12 January 2023)
- Completed (19:43, 12 January 2023)
- Neural Architecture Search using Reinforcement Learning and Search Space Reduction (12:58, 16 January 2023)
- Accelerating Stencil Workloads on Snitch using ISSRs (1-2S/B) (22:29, 19 January 2023)
- Design of low mismatch DAC used for VAD (17:04, 24 January 2023)
- Mixed-Signal Circuit Design (14:26, 25 January 2023)
- High-Speed Digital-to-Analog Converter (DAC) for massive MIMO testing in 65nm CMOS (14:29, 25 January 2023)
- High-Speed SAR ADC for next generation wireless communication in 12nm FinFET (14:30, 25 January 2023)
- Wearables for Sports and Life Enhancement (14:17, 28 January 2023)
- SmartRing (10:45, 31 January 2023)
- BLISS - Battery-Less Identification System for Security (10:45, 31 January 2023)
- Configurable Ultra Low Power LDO (19:20, 13 February 2023)
- Simulation of 2D artificial cilia metasurface in COMSOL (10:21, 14 February 2023)
- Noise Figure Measurement for Cryogenic System (10:32, 14 February 2023)
- An Ultra-Compact High-Power CMOS Power Amplifier for Millimeter-Wave 5G Communications (10:33, 14 February 2023)
- Design of a D-Band Variable Gain Amplifier for 6G Communication (10:44, 14 February 2023)
- High resolution, low power Sigma Delta ADC (11:29, 14 February 2023)
- Energy Efficient Serial Link (11:44, 14 February 2023)
- Super Resolution Radar/Imaging at mm-Wave frequencies (11:44, 14 February 2023)
- Machine Learning Assisted Direct Synthesis of Passive Networks (11:44, 14 February 2023)
- Template (15:44, 14 February 2023)
- Electrically verifying a CMOS Multi-Modal Electrochemical, Impedance, and Optical Cellular Sensing Array for Massively Paralleled Exoelectrogen Screening (16:46, 17 February 2023)
- Charge and heat transport through graphene nanoribbon based devices (17:28, 20 February 2023)
- Energy Efficient AXI Interface to Serial Link Physical Layer (18:21, 20 February 2023)
- BirdGuard (08:32, 23 February 2023)
- Mixed Signal IC Design (17:27, 1 March 2023)
- Guillaume Mocquard (17:55, 1 March 2023)
- Digital Control of a DC/DC Buck Converter (18:06, 1 March 2023)
- Analog (18:11, 1 March 2023)
- Peripheral Event Linking System for Real-time Capable Energy Efficient SoCs (19:54, 1 March 2023)
- Ternary Neural Networks for Face Recognition (09:54, 8 March 2023)
- Mapping Networks on Reconfigurable Binary Engine Accelerator (09:55, 8 March 2023)
- Design of a Prototype Chip with Interleaved Memory and Network-on-Chip (14:30, 8 March 2023)
- Efficient Banded Matrix Multiplication for Quantum Transport Simulations (15:56, 1 May 2023)
- ASIC Implementation of Jammer Mitigation (13:31, 10 May 2023)
- Novel Methods for Jammer Mitigation (13:32, 10 May 2023)
- Weak-strong massive MIMO communication with low-resolution ADCs (13:33, 10 May 2023)
- Optimizing the Pipeline in our Floating Point Architectures (1S) (14:27, 15 May 2023)
- Artificial Reverberation for Embedded Systems (12:39, 14 June 2023)
- Running Rust on PULP (14:14, 29 June 2023)
- Implementing Configurable Dual-Core Redundancy (14:15, 29 June 2023)
- Michael Rogenmoser (17:30, 3 July 2023)
- Development of statistics and contention monitoring unit for PULP (14:47, 7 July 2023)
- Fast Accelerator Context Switch for PULP (16:27, 7 July 2023)
- Smart Goggles for Visual In-Action Feedback in Ski Jumping (1 B/S) (23:11, 14 July 2023)
- Smart Googles for Visual In-Action Feedback in Ski Jumping (1 B/S) (23:13, 14 July 2023)
- Modular Distributed Data Collection Platform (12:58, 20 July 2023)
- Testbed Design for Self-sustainable IoT Sensors (13:03, 20 July 2023)
- Towards Flexible and Printable Wearables (13:06, 20 July 2023)
- Wireless EEG Acquisition and Processing (15:04, 20 July 2023)
- Continual Learning for Adaptive EEG Monitoring in Epileptic Seizure Detection (15:04, 20 July 2023)
- Adaptively Controlled Polarization And Hysteresis Curve Tracing For Polymer Piezoelectrics (1 S/B) (18:14, 21 July 2023)
- Development Of A Test Bed For Ultrasonic Transducer Characterization (1 S/B) (18:18, 21 July 2023)
- Ultrasound image data recycler (18:19, 21 July 2023)
- ML based Quantitative Movement Analysis on a Portable IoT Camera (1-2S/B) (12:12, 23 July 2023)
- Multisensory system for performance analysis in ski jumping (M/1-2S/B) (12:13, 23 July 2023)
- Smart Goggles for Visual In-Action Feedback in Ski Jumping (1 M 1-2B/S) (12:15, 23 July 2023)
- Wireless In Action Data Streaming in Ski Jumping (1 B/S) (12:15, 23 July 2023)
- Skin coupling media characterization for fitnesstracker applications (1 B/S) (12:43, 23 July 2023)
- Flexible Electronic Systems and Embedded Epidermal Devices (12:43, 23 July 2023)
- Wearables for Sports and Fitness Tracking (12:43, 23 July 2023)
- Integrating Ultrasound Technology into a Fitness Tracking Device (1M, 2 B/S) (10:04, 24 July 2023)
- Skin Coupling Media Characterization For Fitness Tracker Applications (1 B/S) (10:07, 24 July 2023)
- Matteo Perotti (15:52, 9 August 2023)
- Developing a Transposition Unit to Accelerate ML Workloads (1-3S/B) (09:39, 23 August 2023)
- Smart Meters (10:14, 23 August 2023)
- Creating a Compact Power Supply and Monitoring System for the Occamy Chip (1-3S/B/2-3G) (09:31, 29 August 2023)
- Resource-Constrained Few-Shot Learning for Keyword Spotting (1S) (17:37, 1 September 2023)
- Evaluating SoA Post-Training Quantization Algorithms (17:38, 1 September 2023)
- Audio Visual Speech Separation (1S/1M) (17:44, 1 September 2023)
- Audio Visual Speech Recognition (1S/1M) (18:08, 1 September 2023)
- Jammer-Resilient Synchronization for Wireless Communications (16:22, 20 September 2023)
- Jammer Mitigation Meets Machine Learning (16:23, 20 September 2023)
- ASIC Implementation of a Low-Power mmWave Massive MIMO Equalizer with a Custom Number Format (17:14, 26 September 2023)
- VLSI Implementation of a Systolic Array for LMMSE Detection in mmWave Massive MIMO-OFDM (17:16, 26 September 2023)
- Integrated Devices, Electronics, And Systems (16:26, 27 September 2023)
- A FPGA-based data streaming system that enables real-time monitoring of cell culture and neuroactivities (16:27, 27 September 2023)
- System Emulation for AR and VR devices (18:28, 4 October 2023)
- Fault Tolerance (13:32, 6 October 2023)
- Weekly Reports (07:08, 7 October 2023)
- Optimal routing for 2D Mesh-based Analog Compute-In-Memory Accelerator Architecture (IBM-Zurich) (14:53, 11 October 2023)
- On - Device Continual Learning for Seizure Detection on GAP9 (11:16, 12 October 2023)
- Realtime Gaze Tracking on Siracusa (00:14, 16 October 2023)
- AXI-based Network on Chip (NoC) system (14:43, 23 October 2023)
- MCU Bus and Memory Generator: implementation of a Highly Configurable bus and memory subsystem for a RISC-V based microcontroller. (14:44, 23 October 2023)
- Softmax for Transformers (M/1-2S) (14:46, 23 October 2023)
- Andrea Cossettini (14:48, 23 October 2023)
- Transformer Deployment on Heterogeneous Many-Core Systems (14:52, 23 October 2023)
- Improving datarate and efficiency of ultra low power wearable ultrasound (15:10, 23 October 2023)
- Low Power Embedded Systems and Wireless Sensors Networks (15:17, 23 October 2023)
- Self Aware Epilepsy Monitoring (15:25, 23 October 2023)
- EEG artifact detection with machine learning (15:25, 23 October 2023)
- EEG artifact detection for epilepsy monitoring (15:25, 23 October 2023)
- BCI-controlled Drone (15:27, 23 October 2023)
- Predict eye movement through brain activity (15:27, 23 October 2023)
- Development Of An FPGA-Based Optoacoustic Image Reconstruction Platform for Clinical Applications (15:27, 23 October 2023)
- Ultrasound measurement of microbubble stiffness for in situ detection of protease activity in clinical settings (15:28, 23 October 2023)
- Machine Learning on Ultrasound Images (15:28, 23 October 2023)
- Visualizing Functional Microbubbles using Ultrasound Imaging (15:28, 23 October 2023)
- Enhancing our DMA Engine with Fault Tolerance (13:16, 24 October 2023)
- Design of an Area-Optimized Soft-Error Resilient Processing Core for Safety-Critical Systems (1M) (13:23, 24 October 2023)
- Network-off-Chip (M) (14:27, 24 October 2023)
- Network-on-Chip for coherent and non-coherent traffic (M) (14:29, 24 October 2023)
- Radiation Testing of a PULP ASIC (14:59, 25 October 2023)
- Scan Chain Fault Injection in a PULP SoC (1S) (15:09, 25 October 2023)
- Vector-based Manycore HPC Cluster Exploration for 5G Communication Algorithm (1-2M) (11:41, 31 October 2023)
- Vector-based Parallel Programming Optimization of Communication Algorithm (1-2S/B) (11:57, 31 October 2023)
- Routing 1000s of wires in Network-on-Chips (1-2S/M) (16:23, 31 October 2023)
- Energy Efficient SoCs (15:59, 1 November 2023)
- Runtime partitioning of L1 memory in Mempool (M) (10:38, 2 November 2023)
- Enabling Efficient Systolic Execution on MemPool (M) (10:39, 2 November 2023)
- On-Device Training Sparse Sub-Tensor Update Scheme Optimization for CNN-based tasks (SA or MA) (13:29, 2 November 2023)
- Creating A Technology-independent USB1.0 Host Implementation Targetting ASICSs (1-3S/B) (09:27, 3 November 2023)
- Fitting Power Consumption of an IP-based HLS Approach to Real Hardware (1-3S) (09:27, 3 November 2023)
- Design of an Energy-Efficient Ethernet Interface for Linux-capable Systems (09:28, 3 November 2023)
- Design of a CAN Interface to Enable Reliable Sensors-to-Processors Communication for Automotive-oriented Embedded Applications (1M) (09:28, 3 November 2023)
- Design of a Scalable High-Performance and Low-Power Interface Based on the I3C Protocol (1M) (09:30, 3 November 2023)
- Design of a Scalable High-Performance and Low-Power Interface Based on the I3C Protocol (B/1-3S) (09:34, 3 November 2023)
- Extension and Evaluation of TinyDMA (1-2S/B/2-3G) (09:35, 3 November 2023)
- Finalizing and Releasing Our Open-source AXI4 IPs (1-3S/B/2-3G) (09:36, 3 November 2023)
- Extending Our DMA Architecture with SiFives TileLink Protocol (1-3S/B) (09:36, 3 November 2023)
- Enhancing Our DMA Engine With Virtual Memory (M/1-3S/B) (09:36, 3 November 2023)
- Towards a High-performance Open-source Verification Suite for AXI-based Systems (M/1-3S/B) (09:38, 3 November 2023)
- Improving SystemVerilog Support for Free And Open-Source EDA Tools (1-3S/B) (09:38, 3 November 2023)
- Modeling High Bandwidth Memory for Rapid Design Space Exploration (1-3S/B) (09:39, 3 November 2023)
- Creating A Boundry Scan Generator (1-3S/B/2-3G) (09:55, 3 November 2023)
- IP-Based SoC Generation and Configuration (1-3S/B) (10:19, 3 November 2023)
- Towards Formal Verification of the iDMA Engine (1-3S/B) (10:21, 3 November 2023)
- Evaluating The Use of Snitch In The PsPIN RISC-V In-network Accelerator (M) (10:24, 3 November 2023)
- Creating A Reshuffling Mid-end For Reorganizing Data Inside The Compute Cluster (1-3S/B) (10:25, 3 November 2023)
- Creating an At-memory Low-overhead Bufferless Matrix Transposition Accelerator (1-3S/B) (10:27, 3 November 2023)
- Advanced Physical Design: Reinforcement Learning for Macro Placement and Mix-Placer (B/1-2S) (10:50, 3 November 2023)
- Scaleout Study on Interleaved Memory Transfers in Huge Manycore Systems with Multiple HBM Channels (M/1-3S) (11:18, 3 November 2023)
- Big Data Analytics Benchmarks for Ara (11:34, 3 November 2023)
- Efficient Execution of Transformers in RISC-V Vector Machines with Custom HW acceleration (M) (11:35, 3 November 2023)
- New RVV 1.0 Vector Instructions for Ara (11:37, 3 November 2023)
- Virtual Memory Ara (11:38, 3 November 2023)
- Investigating the Cost of Special-Case Handling in Low-Precision Floating-Point Dot Product Units (1S) (18:20, 3 November 2023)
- Federico Villani (18:30, 8 November 2023)
- Design of Streaming Data Platform for High-Speed ADC Data (11:16, 9 November 2023)
- Designing a Fault-Tolerant On-Chip Interconnect (1-2S/M) (17:19, 13 November 2023)
- Practical Reconfigurable Intelligent Surfaces (RIS) (12:25, 16 November 2023)
- Advanced Data Movers for Modern Neural Networks (16:18, 23 November 2023)
- Cycle-Accurate Event-Based Simulation of Snitch Core (22:54, 23 November 2023)
- Hardware Acceleration (17:04, 24 November 2023)
- Acceleration and Transprecision (17:05, 24 November 2023)
- Taping a Safer Silicon Implementation of Snitch (M/2-3S) (18:47, 24 November 2023)
- Modeling FlooNoC in GVSoC (S/M) (15:15, 4 December 2023)
- Object Detection and Tracking on the Edge (10:55, 5 December 2023)
- Design of a Low Power Smart Sensing Multi-modal Vision Platform (11:02, 5 December 2023)
- Design of a High-performance Hybrid PTZ for Multimodal Vision Systems (11:07, 5 December 2023)
- Battery indifferent wearable Ultrasound (18:42, 6 December 2023)
- Automatic unplugging detection for Ultrasound probes (18:42, 6 December 2023)
- In-ear EEG signal acquisition (19:01, 6 December 2023)
- EEG earbud (19:01, 6 December 2023)
- Advanced EEG glasses (19:01, 6 December 2023)
- Design of combined Ultrasound and PPG systems (19:02, 6 December 2023)
- Wearable Ultrasound for Artery monitoring (19:02, 6 December 2023)
- Machine Learning for extracting Muscle features from Ultrasound raw data (19:02, 6 December 2023)
- Ultrasound-EMG combined hand gesture recognition (19:02, 6 December 2023)
- Smart e-glasses for concealed recording of EEG signals (19:02, 6 December 2023)
- Ultrasound based hand gesture recognition (19:03, 6 December 2023)
- Design of combined Ultrasound and Electromyography systems (19:03, 6 December 2023)
- Ultra low power wearable ultrasound probe (19:03, 6 December 2023)
- EEG-based drowsiness detection (19:03, 6 December 2023)
- 3D Matrix Multiplication Unit for ITA (1S) (10:52, 12 December 2023)
- Physical Implementation of ITA (2S) (10:52, 12 December 2023)
- Deep Learning Based Anomaly Detection in ECG Signals Using Foundation Models (19:08, 14 December 2023)
- Exploratory Development of a Unified Foundational Model for Multi Biosignal Analysis (18:00, 15 December 2023)
- Reliability by Switching the Embedded ISA in Ibex (1-2S/B/1M) (11:55, 18 December 2023)
- Pretraining Foundational Models for EEG Signal Analysis Using Open Source Large Scale Datasets (17:04, 18 December 2023)
- Design of a Scalable High-Performance and Low-Power Interface Based on the I3C Protocol (1-3S/B) (17:17, 18 December 2023)
- Design and Implementation of a Fully-digital Platform-independent Integrated Temperature Sensor Enabling DVFS in Open-source Tapeouts (1-3S/B) (17:18, 18 December 2023)
- Streaming Layer Normalization in ITA (M/1-2S) (12:38, 21 December 2023)
- Ultrasound Doppler system development (22:41, 21 December 2023)
- Marco Bertuletti (11:29, 23 December 2023)
- RedCap-5G for IOT application on prototype taped-out silicon (11:31, 23 December 2023)
- ASIC implementation of an interpolation-based wideband massive MIMO detector (16:51, 8 January 2024)
- Integrated Information Processing (16:53, 8 January 2024)
- NeuroSoC RISC-V Component (M/1-2S) (17:26, 10 January 2024)
- Resource Partitioning of RPC DRAM (09:32, 15 January 2024)
- HW/SW Safety and Security (09:49, 15 January 2024)
- Benchmarking a heterogeneous 217-core MPSoC on HPC applications (M/1-3S) (10:47, 25 January 2024)
- A Flexible FPGA-Based Peripheral Platform Extending Linux-Capable Systems on Chip (1-3S/B) (10:49, 25 January 2024)
- High Performance SoCs (10:54, 25 January 2024)
- Low Precision Ara for ML (12:36, 29 January 2024)
- Spatz grows wings: Physical Implementation of a Vector-Powered Manycore System (2S) (12:36, 29 January 2024)
- Extending the HERO RISC-V HPC stack to support multiple devices on heterogeneous SoCs (M/1-3S) (12:19, 12 February 2024)
- A RISC-V fault-tolerant many-core accelerator for 5G Non-Terrestrial Networks (1-2S/B) (13:02, 12 February 2024)
- Building an RTL top level for a Mempool-based Heterogeneous SoC (M/1-3S) (15:57, 13 February 2024)
- Development of an implantable Force sensor for orthopedic applications (18:57, 13 February 2024)
- Energy-Efficient Edge-Pursuit comparator for ultra-low power ADC (13:36, 14 February 2024)
- Feature Extraction and Architecture Clustering for Keyword Spotting (1S) (13:31, 15 February 2024)
- Extreme-Edge Experience Replay for Keyword Spotting (13:56, 15 February 2024)
- Learning at the Edge with Hardware-Aware Algorithms (13:59, 15 February 2024)
- Bandwidth Efficient NEureka (14:05, 15 February 2024)
- Probabilistic training algorithms for quantized neural networks (14:06, 15 February 2024)
- Exploring NAS spaces with C-BRED (14:08, 15 February 2024)
- Probing the limits of fake-quantised neural networks (14:08, 15 February 2024)
- Exploring schedules for incremental and annealing quantization algorithms (14:15, 15 February 2024)
- Writing a Hero runtime for EPAC (1-3S/B) (15:27, 15 February 2024)
- Integrating an Open-Source Double-Precision Floating-Point DivSqrt Unit into CVFPU (1S) (15:40, 15 February 2024)
- Extending our FPU with Internal High-Precision Accumulation (M) (15:54, 15 February 2024)
- Hardware Exploration of Shared-Exponent MiniFloats (M) (15:55, 15 February 2024)
- Investigation of Quantization Strategies for Retentive Networks (1S) (14:28, 18 February 2024)
- On-Board Software for PULP on a Satellite (14:29, 18 February 2024)
- Implementation of an Accelerator for Retentive Networks (1-2S) (14:31, 18 February 2024)
- Zephyr RTOS on PULP (15:28, 19 February 2024)
- Real-time Linux on RISC-V (15:29, 19 February 2024)
- Deep Learning Projects (19:29, 19 February 2024)
- Neural Recording Interface and Signal Processing (10:26, 21 February 2024)
- Neural Recording Interface and Spike Sorting Algorithm (10:36, 21 February 2024)
- FPGA mapping of RPC DRAM (20:29, 21 February 2024)
- Efficient collective communications in FlooNoC (1M) (19:52, 22 February 2024)
- Digital (15:21, 23 February 2024)
- Main Page (15:22, 23 February 2024)
- Digital Medical Ultrasound Imaging (16:16, 23 February 2024)
- Implementation of a Cache Reliability Mechanism (1S/M) (14:22, 27 February 2024)
- Creating a Free and Open-Source Verification Environment for Our New DMA Engine (1-3S/B) (14:22, 27 February 2024)
- Fault-Tolerant Floating-Point Units (M) (14:23, 27 February 2024)
- Designing a Scalable Miniature I/O DMA (1-2B/1-3S/M) (14:24, 27 February 2024)
- On-Device Federated Continual Learning on Nano-Drone Swarms (00:49, 29 February 2024)
- On-Device Learnable Embeddings for Acoustic Environments (01:10, 29 February 2024)
- Audio Visual Speech Separation and Recognition (1S/1M) (14:15, 1 March 2024)
- Resource Partitioning of Caches (14:07, 4 March 2024)
- Design of Power-Noise-Efficient Discrete-Time Amplifier Using Open-Source Tools (17:01, 4 March 2024)
- An Ultra-Low-Power Neuromorphic Spiking Neuron Design (17:01, 4 March 2024)
- Classification of Evoked Local-Field Potentials in Rat Barrel Cortex using Hyper-dimensional Computing (19:58, 10 March 2024)
- Graph neural networks for epileptic seizure detection (19:58, 10 March 2024)
- Data Augmentation Techniques in Biosignal Classification (19:59, 10 March 2024)
- Compression of iEEG Data (20:01, 10 March 2024)
- Contrastive Learning for Self-supervised Clustering of iEEG Data for Epileptic Patients (20:01, 10 March 2024)
- Real-Time Motor-Imagery Classification Using Neuromorphic Processor (20:02, 10 March 2024)
- Deep neural networks for seizure detection (20:02, 10 March 2024)
- Mixed-Precision Neural Networks for Brain-Computer Interface Applications (20:04, 10 March 2024)
- Spiking Neural Network for Motor Function Decoding Based on Neural Dust (20:05, 10 March 2024)
- Human Intranet (20:09, 10 March 2024)
- GPT on the edge (11:35, 12 March 2024)
- Benchmarking a RISC-V-based Server on LLMs/Foundation Models (SA or MA) (11:37, 12 March 2024)
- A reduction-capable AXI XBAR for fast M-to-1 communication (1M) (11:45, 13 March 2024)
- GDBTrace: A Post-Simulation Trace-Based RISC-V GDB Debugging Server (1S) (11:49, 13 March 2024)
- IBM Research (15:20, 15 March 2024)
- ASR-Waveformer (11:50, 18 March 2024)
- Biomedical Circuits, Systems, and Applications (19:16, 23 March 2024)
- Benchmarking RISC-V-based Accelerator Cards for Inference (multiple SA) (13:24, 12 April 2024)
- A RISC-V ISA Extension for Scalar Chaining in Snitch (M) (18:58, 21 April 2024)
- ASIC implementation of a beamspace massive MIMO-OFDM detector for 5G/6G (15:51, 28 April 2024)
- A RISC-V ISA Extension for Pseudo Dual-Issue Monte Carlo in Snitch (1M/2S) (14:25, 2 May 2024)
- Accelerating Matrix Multiplication on a 216-core MPSoC (1M) (14:25, 2 May 2024)
