Pages with the most categories
From iis-projects
Showing below up to 100 results in range #121 to #220.
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- Heroino: Design of the next CORE-V Microcontroller (10 categories)
- Integrating Ultrasound Technology into a Fitness Tracking Device (1M, 2 B/S) (10 categories)
- Design of a CAN Interface to Enable Reliable Sensors-to-Processors Communication for Automotive-oriented Embedded Applications (1M) (10 categories)
- StoneEDGE: An EC-GSM-IoT and Evolved EDGE PHY ASIC (10 categories)
- ASR-Waveformer (10 categories)
- Accelerator for Spatio-Temporal Video Filtering (10 categories)
- Ultrasound Low power WiFi with IMX7 (10 categories)
- BirdGuard (10 categories)
- Design of an Energy-Efficient Ethernet Interface for Linux-capable Systems (10 categories)
- Air Quality Prediction in Office Rooms (1-2S/M) (10 categories)
- Improving datarate and efficiency of ultra low power wearable ultrasound (10 categories)
- Spatio-Temporal Video Filtering (10 categories)
- Efficient TNN Inference on PULP Systems (10 categories)
- Multi issue OoO Ariane Backend (M) (10 categories)
- Watchdog Timer for PULP (10 categories)
- Shared Correlation Accelerator for an RF SoC (10 categories)
- LightProbe - 200G Remote DMA for GPU FPGA Data Transfers (10 categories)
- Augmenting Our IPs with AXI Stream Extensions (M/1-2S) (10 categories)
- PULPonFPGA: Lightweight Virtual Memory Support - Physically Contiguous Memory (10 categories)
- GUI-developement for an action-cam-based eye tracking device (10 categories)
- Implementing Configurable Dual-Core Redundancy (10 categories)
- Smart Meters (10 categories)
- Physical Implementation of Ara, PULP's Vector Machine (1-2S) (10 categories)
- Scaleout Study on Interleaved Memory Transfers in Huge Manycore Systems with Multiple HBM Channels (M/1-3S) (10 categories)
- Streaming Layer Normalization in ITA (M/1-2S) (10 categories)
- Towards Formal Verification of the iDMA Engine (1-3S/B) (10 categories)
- PULPonFPGA: Lightweight Virtual Memory Support - Software Cache (10 categories)
- A Snitch-Based SoC on iCE40 FPGAs (1-2S/B) (10 categories)
- Data Augmentation Techniques in Biosignal Classification (10 categories)
- Intelligent Disaster Early-Warning System (1-2S/M) (10 categories)
- Ultrasound measurement of microbubble stiffness for in situ detection of protease activity in clinical settings (10 categories)
- PULP’s CLIC extensions for fast interrupt handling (10 categories)
- Physical Implementation of MemPool, PULP's Manycore System (1M/1-2S) (10 categories)
- IP-Based SoC Generation and Configuration (1-3S/B) (10 categories)
- Creating A Boundry Scan Generator (1-3S/B/2-3G) (10 categories)
- Zephyr RTOS on PULP (10 categories)
- Bridging QuantLab with LPDNN (10 categories)
- Improved Collision Avoidance for Nano-drones (10 categories)
- Real-Time Embedded Classification of Neural Activity in Rat Barrel Cortex (10 categories)
- ISA extensions in the Snitch Processor for Signal Processing (M) (10 categories)
- Creating A Technology-independent USB1.0 Host Implementation Targetting ASICSs (1-3S/B) (10 categories)
- Development Of A Test Bed For Ultrasonic Transducer Characterization (1 S/B) (10 categories)
- Floating-Point Divide & Square Root Unit for Transprecision (10 categories)
- IoT Turbo Decoder (10 categories)
- Physics is looking for PULP (9 categories)
- Creating a Compact Power Supply and Monitoring System for the Occamy Chip (1-3S/B/2-3G) (9 categories)
- Learning Image Decompression with Convolutional Networks (9 categories)
- A Multiview Synthesis Core in 65 nm CMOS (9 categories)
- Advanced 5G Repetition Combining (9 categories)
- Improved State Estimation on PULP-based Nano-UAVs (9 categories)
- Event-Driven Convolutional Neural Network Modular Accelerator (9 categories)
- Real-Time Motor-Imagery Classification Using Neuromorphic Processor (9 categories)
- Creating a Free and Open-Source Verification Environment for Our New DMA Engine (1-3S/B) (9 categories)
- Learning at the Edge with Hardware-Aware Algorithms (9 categories)
- PULP in space - Fault Tolerant PULP System for Critical Space Applications (9 categories)
- Towards a High-performance Open-source Verification Suite for AXI-based Systems (M/1-3S/B) (9 categories)
- MemPool on HERO (1S) (9 categories)
- Enhancing Our DMA Engine With Virtual Memory (M/1-3S/B) (9 categories)
- Improving Cold-Start in Batteryless And Energy Harvesting Systems (9 categories)
- Monocular Vision-based Object Following on Nano-size Robotic Blimp (9 categories)
- Hardware Constrained Neural Architechture Search (9 categories)
- Self Aware Epilepsy Monitoring (9 categories)
- Level Crossing ADC For a Many Channels Neural Recording Interface (9 categories)
- Probing the limits of fake-quantised neural networks (9 categories)
- Coherence-Capable Write-Back L1 Data Cache for Ariane (M) (9 categories)
- Reliability by Switching the Embedded ISA in Ibex (1-2S/B/1M) (9 categories)
- Implementation of an Accelerator for Retentive Networks (1-2S) (9 categories)
- Skin Coupling Media Characterization For Fitness Tracker Applications (1 B/S) (9 categories)
- LightProbe - WIFI extension (PCB) (9 categories)
- Towards a Technology-independent and Synthesizable AXI4 Performance Monitoring and Throttling Unit (1-2S) (9 categories)
- Continual Learning for Adaptive EEG Monitoring in Epileptic Seizure Detection (9 categories)
- Channel Estimation for 5G Cellular IoT and Fast Fading Channels (9 categories)
- Machine Learning for extracting Muscle features using Ultrasound 2 (9 categories)
- Accelerating Stencil Workloads on Snitch using ISSRs (1-2S/B) (9 categories)
- Internet of Things Network Synchronizer (9 categories)
- On-Device Federated Continual Learning on Nano-Drone Swarms (9 categories)
- Contrastive Learning for Self-supervised Clustering of iEEG Data for Epileptic Patients (9 categories)
- Design and Implementation of an Approximate Floating Point Unit (9 categories)
- Ternary Neural Networks for Face Recognition (9 categories)
- Wireless EEG Acquisition and Processing (9 categories)
- Cycle-Accurate Event-Based Simulation of Snitch Core (9 categories)
- Integrating Hardware Accelerators into Snitch (1S) (9 categories)
- On-Device Learnable Embeddings for Acoustic Environments (9 categories)
- HERO: TLB Invalidation (9 categories)
- Improving SystemVerilog Support for Free And Open-Source EDA Tools (1-3S/B) (9 categories)
- Knowledge Distillation for Embedded Machine Learning (9 categories)
- Wireless In Action Data Streaming in Ski Jumping (1 B/S) (9 categories)
- Outdoor Precision Object Tracking for Rockfall Experiments (9 categories)
- Finalizing and Releasing Our Open-source AXI4 IPs (1-3S/B/2-3G) (9 categories)
- Deep neural networks for seizure detection (9 categories)
- Smart Goggles for Visual In-Action Feedback in Ski Jumping (1 M 1-2B/S) (9 categories)
- EEG artifact detection for epilepsy monitoring (9 categories)
- Trace Debugger for custom RISC-V Core (9 categories)
- Autonomus Drones With Novel Sensors And Ultra Wide Band (9 categories)
- Design and VLSI Implementation of a Constrained-Viterbi Algorithm Equalizer for 3GPP TD-HSPA (9 categories)
- AXI-based Network on Chip (NoC) system (9 categories)
- Neural Network Algorithms and Interfaces with Accelerators for Embedded Platforms with Real World Applications (9 categories)
- EEG artifact detection with machine learning (9 categories)
- On - Device Continual Learning for Seizure Detection on GAP9 (9 categories)
- Counter-based Fast Power Estimation using FPGAs (M/1-3S) (9 categories)
