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From iis-projects
Showing below up to 100 results in range #151 to #250.
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- (hist) LightProbe - 192cha Multiplexer Stage (Rigid-Flex-PCB Project) [1,841 bytes]
- (hist) Students' Interanational Competitions: F1(AMZ), Swissloop, Educational Rockets [1,852 bytes]
- (hist) Open Source Baseband Firmware for 2G Cellular Networks [1,858 bytes]
- (hist) Interference Cancellation for the cellular Internet of Things [1,860 bytes]
- (hist) Bluetooth Low Energy network with optimized data throughput [1,860 bytes]
- (hist) Ultrasound Low power WiFi with IMX7 [1,861 bytes]
- (hist) Students' International Competitions: F1(AMZ), Swissloop, Educational Rockets [1,863 bytes]
- (hist) Fast and Accurate Multiclass Inference for Brain–Computer Interfaces [1,865 bytes]
- (hist) Low-Dropout Regulators for Magnetic Resonance Imaging [1,867 bytes]
- (hist) Reliability by Switching the Embedded ISA in Ibex (1-2S/B/1M) [1,878 bytes]
- (hist) Wiederverwendung (reuse) ganzer Funktionsblöcke beim VLSI-Entwurf [1,896 bytes]
- (hist) Implementation of a Coherent Application-Class Multicore System (1-2S) [1,897 bytes]
- (hist) Multi-Band Receiver Design for LTE Mobile Communication [1,907 bytes]
- (hist) LightProbe [1,907 bytes]
- (hist) Near-Optimal Reduced-Complexity Sequence Detectors for TD-HSPA [1,914 bytes]
- (hist) Fitting Power Consumption of an IP-based HLS Approach to Real Hardware (1-3S) [1,929 bytes]
- (hist) Praxisgerechte Berechnung von Switching Noise in VLSI-Schaltungen [1,931 bytes]
- (hist) Enabling Standalone Operation for a Mobile Health Platform [1,934 bytes]
- (hist) Soft-Output Viterbi Equalizer as part of Evolved EDGE baseband ASIC [1,946 bytes]
- (hist) GUI-developement for an action-cam-based eye tracking device [1,949 bytes]
- (hist) High Performance Cellular Receivers in Very Advanced CMOS [1,952 bytes]
- (hist) Make Cellular Internet of Things Receivers Smart [1,954 bytes]
- (hist) Towards Formal Verification of the iDMA Engine (1-3S/B) [1,954 bytes]
- (hist) Non-binary LDPC Decoder for Deep-Space Optical Communications [1,958 bytes]
- (hist) Jammer-Resilient Synchronization for Wireless Communications [1,962 bytes]
- (hist) Wireless Biomedical Signal Acquisition Device [1,982 bytes]
- (hist) 3D Ultrasound Bubble Tracking [1,982 bytes]
- (hist) RazorEDGE: An Evolved EDGE DBB ASIC [1,995 bytes]
- (hist) Implementation of a Cache Reliability Mechanism (1S/M) [1,996 bytes]
- (hist) ASIC Design of a Sigma Point Processor [1,998 bytes]
- (hist) Beat DigRF [2,000 bytes]
- (hist) Electrically verifying a CMOS Multi-Modal Electrochemical, Impedance, and Optical Cellular Sensing Array for Massively Paralleled Exoelectrogen Screening [2,001 bytes]
- (hist) Energy Efficient AXI Interface to Serial Link Physical Layer [2,020 bytes]
- (hist) High-Resolution Large-Bandwidth Delta-Sigma A/D Converters in Ultra-Scaled CMOS [2,024 bytes]
- (hist) Signal to Noise Ratio Estimation for 3G standards [2,025 bytes]
- (hist) Channel Estimation for TD-HSPA [2,028 bytes]
- (hist) Event-Driven Computing [2,043 bytes]
- (hist) Interference Cancellation for Evolved EDGE on the RazorEDGE baseband ASIC [2,044 bytes]
- (hist) Acceleration and Transprecision [2,054 bytes]
- (hist) Implementation of an AES Hardware Processing Engine (B/S) [2,064 bytes]
- (hist) Analog building blocks for mmWave manipulation [2,064 bytes]
- (hist) Intelligent Power Management Unit (iPMU) [2,067 bytes]
- (hist) Compression of Ultrasound data on FPGA [2,067 bytes]
- (hist) Predictable Execution [2,068 bytes]
- (hist) Machine Learning on Ultrasound Images [2,071 bytes]
- (hist) Design of a Digital Audio Module for Ultra-Low Power Cellular Applications [2,072 bytes]
- (hist) Improving Resiliency of Hyperdimensional Computing [2,073 bytes]
- (hist) Audio DAC Conversion Jitter Measurement System [2,075 bytes]
- (hist) Sub Noise Floor Channel Estimation for the Cellular Internet of Things [2,078 bytes]
- (hist) Finalizing and Releasing Our Open-source AXI4 IPs (1-3S/B/2-3G) [2,089 bytes]
- (hist) ASIC Design Projects [2,094 bytes]
- (hist) Fault-Tolerant Floating-Point Units (M) [2,097 bytes]
- (hist) Internet of Things SoC Characterization [2,109 bytes]
- (hist) SHAre - An application Specific Instruction Set Processor for SHA-2/3 [2,124 bytes]
- (hist) A Novel Constrained-Viterbi Algorithm with Linear Equalization and Grouping Assistance [2,129 bytes]
- (hist) DC-DC Buck converter in 65nm CMOS [2,131 bytes]
- (hist) A mmWave Voltage-Controlled-Oscillator (VCO) for beyond 5G applications [2,135 bytes]
- (hist) Design of a Prototype Chip with Interleaved Memory and Network-on-Chip [2,152 bytes]
- (hist) EvalEDGE: A 2G Cellular Transceiver FMC [2,158 bytes]
- (hist) High Throughput Turbo Decoder Design [2,163 bytes]
- (hist) Machine Learning for extracting Muscle features using Ultrasound [2,167 bytes]
- (hist) Towards a High-performance Open-source Verification Suite for AXI-based Systems (M/1-3S/B) [2,176 bytes]
- (hist) Development of an efficient algorithm for quantum transport codes [2,177 bytes]
- (hist) Extension and Evaluation of TinyDMA (1-2S/B/2-3G) [2,186 bytes]
- (hist) Hardware Exploration of Shared-Exponent MiniFloats (M) [2,189 bytes]
- (hist) Low Power Embedded Systems [2,192 bytes]
- (hist) Self Aware Epilepsy Monitoring [2,194 bytes]
- (hist) An Ultra-Low-Power Neuromorphic Spiking Neuron Design [2,197 bytes]
- (hist) An Ultra-Compact High-Power CMOS Power Amplifier for Millimeter-Wave 5G Communications [2,200 bytes]
- (hist) LightProbe - Ultracompact Power Supply PCB [2,201 bytes]
- (hist) Taping a Safer Silicon Implementation of Snitch (M/2-3S) [2,217 bytes]
- (hist) LAPACK/BLAS for FPGA [2,219 bytes]
- (hist) Extending the RISCV backend of LLVM to support PULP Extensions [2,219 bytes]
- (hist) Android Software Design [2,224 bytes]
- (hist) Reconfigurability of SHA-3 candidates [2,230 bytes]
- (hist) Flexible Front-End Circuit for Biomedical Data Acquisition [2,232 bytes]
- (hist) Learning Image Decompression with Convolutional Networks [2,236 bytes]
- (hist) Energy-Efficient Edge-Pursuit comparator for ultra-low power ADC [2,237 bytes]
- (hist) Development of a syringe label reader for the neurocritical care unit [2,242 bytes]
- (hist) Machine Learning for extracting Muscle features using Ultrasound 2 [2,257 bytes]
- (hist) Low Power Embedded Systems and Wireless Sensors Networks [2,258 bytes]
- (hist) PREM Runtime Scheduling Policies [2,259 bytes]
- (hist) Triple-Core PULPissimo [2,260 bytes]
- (hist) Energy Neutral Multi Sensors Wearable Device [2,264 bytes]
- (hist) Channel Decoding for TD-HSPA [2,272 bytes]
- (hist) RISC-V base ISA for ultra-low-area cores (2-3G) [2,276 bytes]
- (hist) David J. Mack [2,280 bytes]
- (hist) Real-time eye movement analysis on a tablet computer [2,281 bytes]
- (hist) Baseband Processor Development for 4G IoT [2,283 bytes]
- (hist) Low-power Temperature-insensitive Timer [2,284 bytes]
- (hist) Super Resolution Radar/Imaging at mm-Wave frequencies [2,285 bytes]
- (hist) LightProbe - WIFI extension (PCB) [2,299 bytes]
- (hist) Running Rust on PULP [2,302 bytes]
- (hist) Simulation of 2D artificial cilia metasurface in COMSOL [2,307 bytes]
- (hist) Turbo Decoder Design for High Code Rates [2,309 bytes]
- (hist) Visualizing Functional Microbubbles using Ultrasound Imaging [2,317 bytes]
- (hist) Implementation of Computationally Efficient Scattering Mechanisms for Periodic Devices and 2D Materials [2,318 bytes]
- (hist) TCNs vs. LSTMs for Embedded Platforms [2,318 bytes]
- (hist) WCDMA/HSPA+ Synchronization System Design, Implementation, and Testing [2,319 bytes]
- (hist) Creating an At-memory Low-overhead Bufferless Matrix Transposition Accelerator (1-3S/B) [2,332 bytes]