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Showing below up to 500 results in range #1 to #500.

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1. (hist) ‎Deep Learning Projects ‎[18,260 bytes]
2. (hist) ‎Human Intranet ‎[17,908 bytes]
3. (hist) ‎Cycle-Accurate Event-Based Simulation of Snitch Core ‎[14,727 bytes]
4. (hist) ‎Energy Efficient Autonomous UAVs ‎[14,635 bytes]
5. (hist) ‎Feature Extraction and Architecture Clustering for Keyword Spotting (1S) ‎[13,131 bytes]
6. (hist) ‎Transforming MemPool into a CGRA (M) ‎[13,059 bytes]
7. (hist) ‎Resource-Constrained Few-Shot Learning for Keyword Spotting (1S) ‎[12,726 bytes]
8. (hist) ‎Efficient Synchronization of Manycore Systems (M/1S) ‎[12,563 bytes]
9. (hist) ‎Feature Extraction for Speech Recognition (1S) ‎[11,915 bytes]
10. (hist) ‎A Flexible Peripheral System for High-Performance Systems on Chip (M) ‎[11,717 bytes]
11. (hist) ‎A Snitch-based Compute Accelerator for HERO (M/1-2S) ‎[11,101 bytes]
12. (hist) ‎LLVM and DaCe for Snitch (1-2S) ‎[11,092 bytes]
13. (hist) ‎Audio Visual Speech Separation and Recognition (1S/1M) ‎[11,029 bytes]
14. (hist) ‎Bringup and Evaluation of an Energy-efficient Heterogeneous Manycore Compute Platform (1-2S) ‎[11,007 bytes]
15. (hist) ‎Online Learning of User Features (1S) ‎[10,895 bytes]
16. (hist) ‎High Performance SoCs ‎[10,887 bytes]
17. (hist) ‎On-Device Learnable Embeddings for Acoustic Environments ‎[10,834 bytes]
18. (hist) ‎Implementation of a Small and Energy-Efficient RISC-V-based Vector Accelerator (1M) ‎[10,771 bytes]
19. (hist) ‎Ottocore: A Minimal RISC-V Core Designed for Teaching (B/2G) ‎[10,534 bytes]
20. (hist) ‎PULP ‎[10,511 bytes]
21. (hist) ‎Ultra-low power processor design ‎[10,511 bytes]
22. (hist) ‎ASR-Waveformer ‎[10,179 bytes]
23. (hist) ‎Implementing DSP Instructions in Banshee (1S) ‎[10,092 bytes]
24. (hist) ‎On-Device Federated Continual Learning on Nano-Drone Swarms ‎[10,073 bytes]
25. (hist) ‎Hyperdimensional Computing ‎[9,993 bytes]
26. (hist) ‎Graph neural networks for epileptic seizure detection ‎[9,773 bytes]
27. (hist) ‎Fast Simulation of Manycore Systems (1S) ‎[9,741 bytes]
28. (hist) ‎Bringing XNOR-nets (ConvNets) to Silicon ‎[9,740 bytes]
29. (hist) ‎Biomedical Circuits, Systems, and Applications ‎[9,550 bytes]
30. (hist) ‎IBM Research ‎[9,475 bytes]
31. (hist) ‎Audio Visual Speech Recognition (1S/1M) ‎[9,414 bytes]
32. (hist) ‎Audio Visual Speech Separation (1S/1M) ‎[9,412 bytes]
33. (hist) ‎ISA extensions in the Snitch Processor for Signal Processing (M) ‎[9,151 bytes]
34. (hist) ‎Interfacing PULP with a Brain-Inspired Ultra-Low Power Spiking Cochlea ‎[9,139 bytes]
35. (hist) ‎Design and Implementation of a Convolutional Neural Network Accelerator ASIC ‎[9,080 bytes]
36. (hist) ‎On - Device Continual Learning for Seizure Detection on GAP9 ‎[9,053 bytes]
37. (hist) ‎Rethinking our Convolutional Network Accelerator Architecture ‎[9,007 bytes]
38. (hist) ‎Extreme-Edge Experience Replay for Keyword Spotting ‎[8,980 bytes]
39. (hist) ‎Heroino: Design of the next CORE-V Microcontroller ‎[8,937 bytes]
40. (hist) ‎Manycore System on FPGA (M/S/G) ‎[8,654 bytes]
41. (hist) ‎Continual Learning for Adaptive EEG Monitoring in Epileptic Seizure Detection ‎[8,413 bytes]
42. (hist) ‎MCU Bus and Memory Generator: implementation of a Highly Configurable bus and memory subsystem for a RISC-V based microcontroller. ‎[8,411 bytes]
43. (hist) ‎A Snitch-Based SoC on iCE40 FPGAs (1-2S/B) ‎[8,380 bytes]
44. (hist) ‎An RPC DRAM Implementation for Energy-Efficient ASICs (1-2S) ‎[8,317 bytes]
45. (hist) ‎High-speed Scene Labeling on FPGA ‎[8,302 bytes]
46. (hist) ‎Design of Scalable Event-driven Neural-Recording Digital Interface ‎[8,231 bytes]
47. (hist) ‎A reduction-capable AXI XBAR for fast M-to-1 communication (1M) ‎[8,184 bytes]
48. (hist) ‎FFT-based Convolutional Network Accelerator ‎[8,120 bytes]
49. (hist) ‎Improved State Estimation on PULP-based Nano-UAVs ‎[8,098 bytes]
50. (hist) ‎Improving our Smart Camera System ‎[8,056 bytes]
51. (hist) ‎Peripheral Event Linking System for Real-time Capable Energy Efficient SoCs ‎[8,002 bytes]
52. (hist) ‎Practical Reconfigurable Intelligent Surfaces (RIS) ‎[7,979 bytes]
53. (hist) ‎Floating-Point Divide & Square Root Unit for Transprecision ‎[7,966 bytes]
54. (hist) ‎Spatz grows wings: Physical Implementation of a Vector-Powered Manycore System (2S) ‎[7,927 bytes]
55. (hist) ‎RISC-V based Implementation of Secure Ranging According to IEEE 802.15.4z UWB ‎[7,824 bytes]
56. (hist) ‎GDBTrace: A Post-Simulation Trace-Based RISC-V GDB Debugging Server (1S) ‎[7,808 bytes]
57. (hist) ‎Mixed-Precision Neural Networks for Brain-Computer Interface Applications ‎[7,773 bytes]
58. (hist) ‎Physical Implementation of MemPool, PULP's Manycore System (1M/1-2S) ‎[7,696 bytes]
59. (hist) ‎Self-Supervised User Positioning in Cell-Free Massive MIMO Systems ‎[7,691 bytes]
60. (hist) ‎Towards the Ariane Desktop: Display Output for Ariane on FPGA under Linux (S/B/G) ‎[7,663 bytes]
61. (hist) ‎A RISC-V ISA Extension for Scalar Chaining in Snitch (M) ‎[7,624 bytes]
62. (hist) ‎XNORLAX: Fused XNOR-LATCH Custom-Standard-Cell-Based Processing-in-Memory ‎[7,358 bytes]
63. (hist) ‎Neural Network Algorithms and Interfaces with Accelerators for Embedded Platforms with Real World Applications ‎[7,337 bytes]
64. (hist) ‎Smart Patch For Heath Care And Rehabilitation ‎[7,308 bytes]
65. (hist) ‎Cell-Free mmWave Massive MIMO Communication ‎[7,265 bytes]
66. (hist) ‎Weekly Reports ‎[7,258 bytes]
67. (hist) ‎An all Standard-Cell Based Energy Efficient HW Accelerator for DSP and Deep Learning Applications ‎[7,241 bytes]
68. (hist) ‎Integrating Ultrasound Technology into a Fitness Tracking Device (1M, 2 B/S) ‎[7,201 bytes]
69. (hist) ‎A RISC-V ISA Extension for Pseudo Dual-Issue Monte Carlo in Snitch (1M/2S) ‎[7,168 bytes]
70. (hist) ‎Baseband Meets CPU ‎[7,100 bytes]
71. (hist) ‎Towards Autonomous Navigation for Nano-Blimps ‎[7,095 bytes]
72. (hist) ‎Embedded Audio Source Localization Exploiting Coincidence Detection in Asynchronous Spike Streams ‎[7,095 bytes]
73. (hist) ‎Benchmarking a heterogeneous 217-core MPSoC on HPC applications (M/1-3S) ‎[7,075 bytes]
74. (hist) ‎Integrated Information Processing ‎[7,051 bytes]
75. (hist) ‎Variable Bit Precision Logic for Deep Learning and Artificial Intelligence ‎[6,993 bytes]
76. (hist) ‎Semi-Custom Digital VLSI for Processing-in-Memory ‎[6,973 bytes]
77. (hist) ‎Digital ‎[6,954 bytes]
78. (hist) ‎Hardware Acceleration ‎[6,884 bytes]
79. (hist) ‎Bridging QuantLab with LPDNN ‎[6,871 bytes]
80. (hist) ‎Evaluating memory access pattern specializations in OoO, server-grade cores (M) ‎[6,859 bytes]
81. (hist) ‎ASIC implementation of a beamspace massive MIMO-OFDM detector for 5G/6G ‎[6,834 bytes]
82. (hist) ‎Scalable Heterogeneous L1 Memory Interconnect for Smart Accelerator Coupling in Ultra-Low Power Multicores ‎[6,805 bytes]
83. (hist) ‎On-Device Training Sparse Sub-Tensor Update Scheme Optimization for CNN-based tasks (SA or MA) ‎[6,772 bytes]
84. (hist) ‎Single-Bit-Synapse Spiking Neural System-on-Chip ‎[6,767 bytes]
85. (hist) ‎Accelerating Applications Relying on Matrix-Vector-Product-Like Operations ‎[6,754 bytes]
86. (hist) ‎Learning at the Edge with Hardware-Aware Algorithms ‎[6,742 bytes]
87. (hist) ‎Cerebellum: Design of a Programmable Smart-Peripheral for the Ariane Core ‎[6,724 bytes]
88. (hist) ‎Pretraining Foundational Models for EEG Signal Analysis Using Open Source Large Scale Datasets ‎[6,711 bytes]
89. (hist) ‎Low Power Neural Network For Multi Sensors Wearable Devices ‎[6,700 bytes]
90. (hist) ‎Multisensory system for performance analysis in ski jumping (M/1-2S/B) ‎[6,642 bytes]
91. (hist) ‎Exploring NAS spaces with C-BRED ‎[6,633 bytes]
92. (hist) ‎PULP in space - Fault Tolerant PULP System for Critical Space Applications ‎[6,628 bytes]
93. (hist) ‎Hardware Accelerators for Lossless Quantized Deep Neural Networks ‎[6,626 bytes]
94. (hist) ‎Improving Scene Labeling with Hyperspectral Data ‎[6,596 bytes]
95. (hist) ‎Low-Energy Cluster-Coupled Vector Coprocessor for Special-Purpose PULP Acceleration ‎[6,550 bytes]
96. (hist) ‎Low-Resolution 5G Beamforming Codebook Design ‎[6,549 bytes]
97. (hist) ‎Accelerating Matrix Multiplication on a 216-core MPSoC (1M) ‎[6,535 bytes]
98. (hist) ‎Timing Channel Mitigations for RISC-V Cores ‎[6,515 bytes]
99. (hist) ‎Serverless Benchmarks on RISC-V (M) ‎[6,436 bytes]
100. (hist) ‎Investigation of Quantization Strategies for Retentive Networks (1S) ‎[6,431 bytes]
101. (hist) ‎Efficient collective communications in FlooNoC (1M) ‎[6,417 bytes]
102. (hist) ‎Towards Self-Sustainable Unmanned Aerial Vehicles ‎[6,408 bytes]
103. (hist) ‎Digital Medical Ultrasound Imaging ‎[6,404 bytes]
104. (hist) ‎PULPonFPGA: Lightweight Virtual Memory Support - Physically Contiguous Memory ‎[6,362 bytes]
105. (hist) ‎AMZ Driverless Competition Embedded Systems Projects ‎[6,350 bytes]
106. (hist) ‎PULP-Shield for Autonomous UAV ‎[6,268 bytes]
107. (hist) ‎A Wearable Wireless Kidney Function Monitoring System For BioMedical Applications ‎[6,249 bytes]
108. (hist) ‎Exploratory Development of a Unified Foundational Model for Multi Biosignal Analysis ‎[6,238 bytes]
109. (hist) ‎Vector-based Manycore HPC Cluster Exploration for 5G Communication Algorithm (1-2M) ‎[6,238 bytes]
110. (hist) ‎Smart Virtual Memory Sharing ‎[6,235 bytes]
111. (hist) ‎Exploring schedules for incremental and annealing quantization algorithms ‎[6,214 bytes]
112. (hist) ‎Adaptively Controlled Polarization And Hysteresis Curve Tracing For Polymer Piezoelectrics (1 S/B) ‎[6,198 bytes]
113. (hist) ‎Physical Implementation of Ara, PULP's Vector Machine (1-2S) ‎[6,175 bytes]
114. (hist) ‎Development of statistics and contention monitoring unit for PULP ‎[6,171 bytes]
115. (hist) ‎MemPool on HERO (1S) ‎[6,159 bytes]
116. (hist) ‎Deep Unfolding of Iterative Optimization Algorithms ‎[6,125 bytes]
117. (hist) ‎Deep Learning Based Anomaly Detection in ECG Signals Using Foundation Models ‎[6,124 bytes]
118. (hist) ‎Towards Online Training of CNNs: Hebbian-Based Deep Learning ‎[6,095 bytes]
119. (hist) ‎ML based Quantitative Movement Analysis on a Portable IoT Camera (1-2S/B) ‎[6,070 bytes]
120. (hist) ‎Study and Development of Intelligent Capability for Small-Size UAVs ‎[6,065 bytes]
121. (hist) ‎Deep-Learning Based Phoneme Recognition from a Ultra-Low Power Spiking Cochlea ‎[6,065 bytes]
122. (hist) ‎Approximate Matrix Multiplication based Hardware Accelerator to achieve the next 10x in Energy Efficiency: Full System Intregration ‎[6,051 bytes]
123. (hist) ‎Smart Goggles for Visual In-Action Feedback in Ski Jumping (1 M 1-2B/S) ‎[6,042 bytes]
124. (hist) ‎Ibex: Tightly-Coupled Accelerators and ISA Extensions ‎[6,038 bytes]
125. (hist) ‎VLSI Implementation of a Systolic Array for LMMSE Detection in mmWave Massive MIMO-OFDM ‎[6,032 bytes]
126. (hist) ‎Fast Accelerator Context Switch for PULP ‎[5,986 bytes]
127. (hist) ‎VLSI Design of an Asynchronous LDPC Decoder ‎[5,968 bytes]
128. (hist) ‎Self-Learning Drones based on Neural Networks ‎[5,956 bytes]
129. (hist) ‎Securing Block Ciphers against SCA and SIFA ‎[5,949 bytes]
130. (hist) ‎Convolution Neural Networks on our Ultra-Low Power Mult-Core Plattform PULP ‎[5,909 bytes]
131. (hist) ‎BigPULP: Multicluster Synchronization Extensions ‎[5,902 bytes]
132. (hist) ‎Autoencoder Accelerator for On-Chip Semi-Supervised Learning ‎[5,886 bytes]
133. (hist) ‎Efficient NB-IoT Uplink Design ‎[5,872 bytes]
134. (hist) ‎A FPGA-based data streaming system that enables real-time monitoring of cell culture and neuroactivities ‎[5,826 bytes]
135. (hist) ‎Evaluating SoA Post-Training Quantization Algorithms ‎[5,818 bytes]
136. (hist) ‎BigPULP: Shared Virtual Memory Multicluster Extensions ‎[5,818 bytes]
137. (hist) ‎Huawei Research ‎[5,815 bytes]
138. (hist) ‎Deep neural networks for seizure detection ‎[5,798 bytes]
139. (hist) ‎Vector-based Parallel Programming Optimization of Communication Algorithm (1-2S/B) ‎[5,792 bytes]
140. (hist) ‎Real-Time Motor-Imagery Classification Using Neuromorphic Processor ‎[5,779 bytes]
141. (hist) ‎Wireless In Action Data Streaming in Ski Jumping (1 B/S) ‎[5,770 bytes]
142. (hist) ‎Approximate Matrix Multiplication based Hardware Accelerator to achieve the next 10x in Energy Efficiency: Training Strategy And Algorithmic optimizations ‎[5,756 bytes]
143. (hist) ‎Streaming Integer Extensions for Snitch (M/1-2S) ‎[5,741 bytes]
144. (hist) ‎Autonomous Sensing For Trains In The IoT Era ‎[5,717 bytes]
145. (hist) ‎Indoor Smart Tracking of Hospital instrumentation ‎[5,695 bytes]
146. (hist) ‎Transformer Deployment on Heterogeneous Many-Core Systems ‎[5,672 bytes]
147. (hist) ‎Edge Computing for Long-Term Wearable Biomedical Systems ‎[5,664 bytes]
148. (hist) ‎HERO: TLB Invalidation ‎[5,657 bytes]
149. (hist) ‎Mapping Networks on Reconfigurable Binary Engine Accelerator ‎[5,655 bytes]
150. (hist) ‎Hardware Constrained Neural Architechture Search ‎[5,648 bytes]
151. (hist) ‎NVDLA meets PULP ‎[5,641 bytes]
152. (hist) ‎Novel Methods for Jammer Mitigation ‎[5,640 bytes]
153. (hist) ‎Hyper-Dimensional Computing Based Predictive Maintenance ‎[5,615 bytes]
154. (hist) ‎Probing the limits of fake-quantised neural networks ‎[5,590 bytes]
155. (hist) ‎Training and Deploying Next-Generation Quantized Neural Networks on Microcontrollers ‎[5,588 bytes]
156. (hist) ‎Implementation of an Accelerator for Retentive Networks (1-2S) ‎[5,566 bytes]
157. (hist) ‎Weak-strong massive MIMO communication with low-resolution ADCs ‎[5,552 bytes]
158. (hist) ‎ASIC Implementation of Jammer Mitigation ‎[5,552 bytes]
159. (hist) ‎Neuromorphic Intelligence In An Embedded System in Collaboration with AiCTX ‎[5,537 bytes]
160. (hist) ‎Development Of A Test Bed For Ultrasonic Transducer Characterization (1 S/B) ‎[5,535 bytes]
161. (hist) ‎Visualization of Neural Architecture Search Spaces ‎[5,504 bytes]
162. (hist) ‎Design and Evaluation of a Small Size Avalanche Beacon ‎[5,483 bytes]
163. (hist) ‎Design of a Scalable High-Performance and Low-Power Interface Based on the I3C Protocol (1-3S/B) ‎[5,473 bytes]
164. (hist) ‎Design of an Area-Optimized Soft-Error Resilient Processing Core for Safety-Critical Systems (1M) ‎[5,473 bytes]
165. (hist) ‎Design and Implementation of Digital Spiking Neurons for Ultra-Low-Power In-Cluster Coprocessors ‎[5,469 bytes]
166. (hist) ‎Skin Coupling Media Characterization For Fitness Tracker Applications (1 B/S) ‎[5,458 bytes]
167. (hist) ‎Outdoor Precision Object Tracking for Rockfall Experiments ‎[5,453 bytes]
168. (hist) ‎Autonomous Sensors For Underwater Monitoring In Smart Navy Systems ‎[5,451 bytes]
169. (hist) ‎PULPonFPGA: Lightweight Virtual Memory Support - Software Cache ‎[5,448 bytes]
170. (hist) ‎Skin coupling media characterization for fitnesstracker applications (1 B/S) ‎[5,446 bytes]
171. (hist) ‎Reconfigurable Fully-Unrolled 2D-FFT Core Generator for Multi-Antenna mmWave Communication ‎[5,440 bytes]
172. (hist) ‎Wireless Sensing With Long Range Comminication (LoRa) ‎[5,433 bytes]
173. (hist) ‎Efficient TNN Inference on PULP Systems ‎[5,407 bytes]
174. (hist) ‎Change-based Evaluation of Convolutional Neural Networks ‎[5,393 bytes]
175. (hist) ‎Pressure and acoustic Smart Sensors Network for Wind Turbines Monitoring ‎[5,389 bytes]
176. (hist) ‎Design-Space Exploration of Low-Resolution Matrix-Vector Multipliers ‎[5,381 bytes]
177. (hist) ‎Tiny CNNs for Ultra-Efficient Object Detection on PULP ‎[5,343 bytes]
178. (hist) ‎PULPonFPGA: Lightweight Virtual Memory Support - Page Table Walker ‎[5,233 bytes]
179. (hist) ‎A Demonstrator of Non-Synchronized Hyperdimensional Body Area Networks ‎[5,228 bytes]
180. (hist) ‎Virtual Memory Ara ‎[5,215 bytes]
181. (hist) ‎Aliasing-Free Wavetable Music Synthesizer ‎[5,197 bytes]
182. (hist) ‎Ternary Weights Engine For Efficient Many Channels Spike Sorting Applications ‎[5,193 bytes]
183. (hist) ‎PULPonFPGA: Hardware L2 Cache ‎[5,178 bytes]
184. (hist) ‎Digitally-Controlled Analog Subtractive Sound Synthesis ‎[5,151 bytes]
185. (hist) ‎Combining Spiking Neural Networks with Hyperdimensional Computing for Autonomous Navigation ‎[5,127 bytes]
186. (hist) ‎Low Power Geolocalization And Indoor Localization ‎[5,119 bytes]
187. (hist) ‎Experimental Validation of Impact Ionization Models for TCAD Simulation by a Novel Characterization Technique ‎[5,113 bytes]
188. (hist) ‎Real-Time Optical Flow Using Neural Networks ‎[5,107 bytes]
189. (hist) ‎Neural Architecture Search using Reinforcement Learning and Search Space Reduction ‎[5,098 bytes]
190. (hist) ‎Spiking Neural Network for Motor Function Decoding Based on Neural Dust ‎[5,083 bytes]
191. (hist) ‎Analysis of Low-Power Wide Area Network Technologies for the Internet of Things ‎[5,067 bytes]
192. (hist) ‎Wake Up Radio For Energy Efficient Communication System and IC Design ‎[5,067 bytes]
193. (hist) ‎Predictable Execution on GPU Caches ‎[5,062 bytes]
194. (hist) ‎Implementation of a Heterogeneous System for Image Processing on an FPGA (S) ‎[5,057 bytes]
195. (hist) ‎Smart Wearable System For Vital Sign Monitoring Exploiting On Board and Cloud Machine Learning ‎[5,055 bytes]
196. (hist) ‎Developing a small portable neutron detector for detecting smuggled nuclear material ‎[5,029 bytes]
197. (hist) ‎Trace Debugger for custom RISC-V Core ‎[5,023 bytes]
198. (hist) ‎Through Wall Radar Imaging using Machine Learning ‎[5,006 bytes]
199. (hist) ‎An Industrial-grade Bluetooth LE Mesh Network Solution ‎[5,005 bytes]
200. (hist) ‎Alias-Free Oscillator Synchronization for Arbitrary Waveforms ‎[4,982 bytes]
201. (hist) ‎Real-Time Implementation of Quantum State Identification using an FPGA ‎[4,959 bytes]
202. (hist) ‎Accurate deep learning inference using computational memory ‎[4,931 bytes]
203. (hist) ‎Artificial Reverberation for Embedded Systems ‎[4,929 bytes]
204. (hist) ‎Design of a Reconfigurable Vector Processor Cluster for Area Efficient Radar Processing (1M) ‎[4,904 bytes]
205. (hist) ‎Elliptic Curve Accelerator for zkSNARKs ‎[4,904 bytes]
206. (hist) ‎BCI-controlled Drone ‎[4,903 bytes]
207. (hist) ‎Standard Cell Compatible Memory Array Design ‎[4,900 bytes]
208. (hist) ‎Short Range Radars For Biomedical Application ‎[4,883 bytes]
209. (hist) ‎Signal Acquisition and Clock Offset Compensation for High-Rate Pulse UWB PHYs ‎[4,874 bytes]
210. (hist) ‎Towards global Brain-Computer Interfaces ‎[4,872 bytes]
211. (hist) ‎Passive Radar for UAV Detection using Machine Learning ‎[4,868 bytes]
212. (hist) ‎Knowledge Distillation for Embedded Machine Learning ‎[4,841 bytes]
213. (hist) ‎Design and VLSI Implementation of a Constrained-Viterbi Algorithm Equalizer for 3GPP TD-HSPA ‎[4,841 bytes]
214. (hist) ‎A Wearable System To Control Phone And Electronic Device Without Hands ‎[4,821 bytes]
215. (hist) ‎Counter-based Fast Power Estimation using FPGAs (M/1-3S) ‎[4,808 bytes]
216. (hist) ‎Memory Augmented Neural Networks in Brain-Computer Interfaces ‎[4,791 bytes]
217. (hist) ‎Ibex: FPGA Optimizations ‎[4,790 bytes]
218. (hist) ‎BirdGuard ‎[4,780 bytes]
219. (hist) ‎Real-Time Embedded Classification of Neural Activity in Rat Barrel Cortex ‎[4,766 bytes]
220. (hist) ‎Improving Cold-Start in Batteryless And Energy Harvesting Systems ‎[4,757 bytes]
221. (hist) ‎Contrastive Learning for Self-supervised Clustering of iEEG Data for Epileptic Patients ‎[4,747 bytes]
222. (hist) ‎Modular Frequency-Modulation (FM) Music Synthesizer ‎[4,741 bytes]
223. (hist) ‎Contextual Intelligence on Resource-constraint Bluetooth LE IoT Devices ‎[4,722 bytes]
224. (hist) ‎ASIC Implementation of a Low-Power mmWave Massive MIMO Equalizer with a Custom Number Format ‎[4,720 bytes]
225. (hist) ‎HW/SW Safety and Security ‎[4,719 bytes]
226. (hist) ‎Phase-change memory devices for emerging computing paradigms ‎[4,714 bytes]
227. (hist) ‎Extended Verification for Ara ‎[4,709 bytes]
228. (hist) ‎Design and implementation of the front-end for a portable ionizing radiation detector ‎[4,705 bytes]
229. (hist) ‎Deep Convolutional Autoencoder for iEEG Signals ‎[4,705 bytes]
230. (hist) ‎Classification of Evoked Local-Field Potentials in Rat Barrel Cortex using Hyper-dimensional Computing ‎[4,702 bytes]
231. (hist) ‎Towards Flexible and Printable Wearables ‎[4,686 bytes]
232. (hist) ‎Compression of iEEG Data ‎[4,684 bytes]
233. (hist) ‎Energy Efficient Smart Devices For Construction Building Maintenance Hilti Collaboration ‎[4,684 bytes]
234. (hist) ‎Design of an Energy-Efficient Ethernet Interface for Linux-capable Systems ‎[4,679 bytes]
235. (hist) ‎Embedded Systems and autonomous UAVs ‎[4,674 bytes]
236. (hist) ‎Autonomus Drones With Novel Sensors And Ultra Wide Band ‎[4,671 bytes]
237. (hist) ‎Embedded Gesture Recognition Using Novel Mini Radar Sensors ‎[4,651 bytes]
238. (hist) ‎Main Page ‎[4,639 bytes]
239. (hist) ‎Monocular Vision-based Object Following on Nano-size Robotic Blimp ‎[4,615 bytes]
240. (hist) ‎Nanoelectrode array biosensors - programmable non-overlapping clocks generator project ‎[4,614 bytes]
241. (hist) ‎A Wireless Sensor Network for HPC monitoring ‎[4,609 bytes]
242. (hist) ‎Towards The Integration of E-skin into Prosthetic Devices ‎[4,596 bytes]
243. (hist) ‎OpenRISC SoC for Sensor Applications ‎[4,575 bytes]
244. (hist) ‎Beamspace processing for 5G mmWave massive MIMO on GPU ‎[4,556 bytes]
245. (hist) ‎Digital Audio Interface for Smart Intensive Computing Triggering ‎[4,553 bytes]
246. (hist) ‎Ibex: Bit-Manipulation Extension ‎[4,549 bytes]
247. (hist) ‎BLISS - Battery-Less Identification System for Security ‎[4,534 bytes]
248. (hist) ‎Level Crossing ADC For a Many Channels Neural Recording Interface ‎[4,526 bytes]
249. (hist) ‎Peak-to-average power Reduction ‎[4,518 bytes]
250. (hist) ‎A Waypoint-based Navigation System for Nano-Size UAVs in GPS-denied Environments ‎[4,518 bytes]
251. (hist) ‎Event-Driven Convolutional Neural Network Modular Accelerator ‎[4,511 bytes]
252. (hist) ‎IP-Based SoC Generation and Configuration (1-3S/B) ‎[4,509 bytes]
253. (hist) ‎Low-Complexity MIMO Detection ‎[4,502 bytes]
254. (hist) ‎Characterization techniques for silicon photonics-Lumiphase ‎[4,501 bytes]
255. (hist) ‎Low Resolution Neural Networks ‎[4,495 bytes]
256. (hist) ‎Radio Signal Direction Detection For Smart Glasses For Augmented Reality Applications ‎[4,486 bytes]
257. (hist) ‎Softmax for Transformers (M/1-2S) ‎[4,481 bytes]
258. (hist) ‎Embedded Artificial Intelligence:Systems And Applications ‎[4,477 bytes]
259. (hist) ‎Wearables for Sports and Fitness Tracking ‎[4,473 bytes]
260. (hist) ‎Design space exploration of InP Heterojunction Bipolar Transistors (DHBTs) ‎[4,457 bytes]
261. (hist) ‎Covariant Feature Detector on Parallel Ultra Low Power Architecture ‎[4,449 bytes]
262. (hist) ‎PULPonFPGA: Lightweight Virtual Memory Support - Coherency Extensions ‎[4,449 bytes]
263. (hist) ‎Spiking Neural Network for Autonomous Navigation ‎[4,446 bytes]
264. (hist) ‎Integrating Hardware Accelerators into Snitch (1S) ‎[4,435 bytes]
265. (hist) ‎NAND Flash Open Research Platform ‎[4,406 bytes]
266. (hist) ‎Real-Time ECG Contractions Classification ‎[4,389 bytes]
267. (hist) ‎Data Augmentation Techniques in Biosignal Classification ‎[4,358 bytes]
268. (hist) ‎Zero Power Touch Sensor and Reciever For Body Communication ‎[4,357 bytes]
269. (hist) ‎System Emulation for AR and VR devices ‎[4,347 bytes]
270. (hist) ‎Extend the RI5CY core with priviledge extensions ‎[4,337 bytes]
271. (hist) ‎Flexfloat DL Training Framework ‎[4,334 bytes]
272. (hist) ‎Integrated silicon photonic structures ‎[4,327 bytes]
273. (hist) ‎Low Latency Brain-Machine Interfaces ‎[4,326 bytes]
274. (hist) ‎Integrated silicon photonic structures-Lumiphase ‎[4,317 bytes]
275. (hist) ‎Low-power time synchronization for IoT applications ‎[4,316 bytes]
276. (hist) ‎Probabilistic training algorithms for quantized neural networks ‎[4,315 bytes]
277. (hist) ‎Ultra-Efficient Visual Classification on Movidius Myriad2 ‎[4,313 bytes]
278. (hist) ‎Efficient Digital Signal Processing in High-Channel-Count High-Frame-Rate 3D Ultrasound Imaging Systems ‎[4,311 bytes]
279. (hist) ‎Optogenetics And Game Theory Applied To Small Side Bird Using Smart Sensing ‎[4,310 bytes]
280. (hist) ‎ASIC implementation of an interpolation-based wideband massive MIMO detector ‎[4,308 bytes]
281. (hist) ‎Network-off-Chip (M) ‎[4,302 bytes]
282. (hist) ‎Autonomous Obstacle Avoidance with Nano-Drones and Novel Depth Sensors ‎[4,300 bytes]
283. (hist) ‎Ultra-wideband Concurrent Ranging ‎[4,295 bytes]
284. (hist) ‎OTDOA Positioning for LTE Cat-M ‎[4,289 bytes]
285. (hist) ‎Ara: Update PULP's Vector Processor with the recent RISC-V Vector Extension Development ‎[4,285 bytes]
286. (hist) ‎PULPonFPGA: Lightweight Virtual Memory Support - Multi-Level TLB ‎[4,280 bytes]
287. (hist) ‎A computational memory unit using phase-change memory devices ‎[4,257 bytes]
288. (hist) ‎Birds Long Term Monitoring With Ultra Low Power Wireless Sensor Node ‎[4,251 bytes]
289. (hist) ‎Implementation of a NB-IoT Positioning System ‎[4,245 bytes]
290. (hist) ‎Deep Learning-based Global Local Planner for Autonomous Nano-drones ‎[4,243 bytes]
291. (hist) ‎Physical Implementation of ITA (2S) ‎[4,240 bytes]
292. (hist) ‎Subject specific embeddings for transfer learning in brain-computer interfaces ‎[4,230 bytes]
293. (hist) ‎Design of a High-​performance Hybrid PTZ for Multimodal Vision Systems ‎[4,220 bytes]
294. (hist) ‎Improved Collision Avoidance for Nano-drones ‎[4,218 bytes]
295. (hist) ‎A Unified Compute Kernel Library for Snitch (1-2S) ‎[4,218 bytes]
296. (hist) ‎Creating a HDMI Video Interface for PULP ‎[4,212 bytes]
297. (hist) ‎EEG artifact detection with machine learning ‎[4,211 bytes]
298. (hist) ‎Efficient Memory Stream Handling in RISC-V-based Systems (M/1-2S) ‎[4,183 bytes]
299. (hist) ‎Physics is looking for PULP ‎[4,170 bytes]
300. (hist) ‎Scattering Networks for Scene Labeling ‎[4,163 bytes]
301. (hist) ‎A Wireless Sensor Network for a Smart Building Monitor and Control ‎[4,148 bytes]
302. (hist) ‎Forward error-correction ASIC using GRAND ‎[4,141 bytes]
303. (hist) ‎New RVV 1.0 Vector Instructions for Ara ‎[4,140 bytes]
304. (hist) ‎Efficient Execution of Transformers in RISC-V Vector Machines with Custom HW acceleration (M) ‎[4,135 bytes]
305. (hist) ‎Passive and Self Sustaining Receivers For On and Intra Body Communication For Wearable Sensors Networks ‎[4,132 bytes]
306. (hist) ‎Ultra Low Power Wake Up Radio for Wireless Sensor Network ‎[4,116 bytes]
307. (hist) ‎Internet of Things Network Synchronizer ‎[4,097 bytes]
308. (hist) ‎Modeling FlooNoC in GVSoC (S/M) ‎[4,093 bytes]
309. (hist) ‎Advanced Physical Design: Reinforcement Learning for Macro Placement and Mix-Placer (B/1-2S) ‎[4,090 bytes]
310. (hist) ‎Optimal System Duty Cycling for a Mobile Health Platform ‎[4,070 bytes]
311. (hist) ‎IcySoC ‎[4,070 bytes]
312. (hist) ‎Design of a Low Power Smart Sensing Multi-modal Vision Platform ‎[4,069 bytes]
313. (hist) ‎Software-Defined Paging in the Snitch Cluster (2-3S) ‎[4,036 bytes]
314. (hist) ‎Implementation of the RISC-V Bit Manipulation (RVB) extensions for our RISC-V core ‎[4,019 bytes]
315. (hist) ‎Hardware/software codesign neural decoding algorithm for “neural dust” ‎[4,005 bytes]
316. (hist) ‎Design of an on-field adaptable pulse-processing unit for semicondutor radiation detectors ‎[4,002 bytes]
317. (hist) ‎Unconventional phase change memory device concepts for in-memory and neuromorphic computin ‎[4,001 bytes]
318. (hist) ‎Android reliability governor ‎[3,997 bytes]
319. (hist) ‎Design of a CAN Interface to Enable Reliable Sensors-to-Processors Communication for Automotive-oriented Embedded Applications (1M) ‎[3,975 bytes]
320. (hist) ‎Bandwidth Efficient NEureka ‎[3,968 bytes]
321. (hist) ‎Finite element modeling of electrochemical random access memory ‎[3,967 bytes]
322. (hist) ‎Low Power One bit Microphone for Acoustic Imaging Using A Parallel Processor ‎[3,967 bytes]
323. (hist) ‎PULP’s CLIC extensions for fast interrupt handling ‎[3,953 bytes]
324. (hist) ‎A Multiview Synthesis Core in 65 nm CMOS ‎[3,896 bytes]
325. (hist) ‎PREM Intervals and Loop Tiling ‎[3,888 bytes]
326. (hist) ‎A Recurrent Neural Network Speech Recognition Chip ‎[3,884 bytes]
327. (hist) ‎Completed ‎[3,883 bytes]
328. (hist) ‎Energy-Efficient Brain-Inspired Hyperdimensional Computing ‎[3,880 bytes]
329. (hist) ‎Time and Frequency Synchronization in LTE Cat-0 Devices ‎[3,870 bytes]
330. (hist) ‎Implementing Configurable Dual-Core Redundancy ‎[3,867 bytes]
331. (hist) ‎RVfplib ‎[3,867 bytes]
332. (hist) ‎SmartRing ‎[3,866 bytes]
333. (hist) ‎Implementation of the RISC-V Bit Manipulation (RVB) extensions for our RI5CY core ‎[3,856 bytes]
334. (hist) ‎Real-Time Embedded Systems ‎[3,849 bytes]
335. (hist) ‎Development of a fingertip blood pressure sensor ‎[3,837 bytes]
336. (hist) ‎Object Detection and Tracking on the Edge ‎[3,829 bytes]
337. (hist) ‎Low Precision Ara for ML ‎[3,826 bytes]
338. (hist) ‎Non-blocking Algorithms in Real-Time Operating Systems ‎[3,820 bytes]
339. (hist) ‎Autonomous Smart Watches: Toward an ultra low power microphone detector with events classification ‎[3,798 bytes]
340. (hist) ‎Design Of A Biomarker Assay Based On Responsive Magnetic Nanoparticles ‎[3,795 bytes]
341. (hist) ‎Real-time View Synthesis using Image Domain Warping ‎[3,792 bytes]
342. (hist) ‎Streaming Layer Normalization in ITA (M/1-2S) ‎[3,785 bytes]
343. (hist) ‎Design and Exploitation of a Test-Bench for Non-Destructive Characterization of the Susceptibility of Silicon Carbide (SiC) Power Devices to Cosmic Radiation ‎[3,776 bytes]
344. (hist) ‎Efficient Implementation of an Active-Set QP Solver for FPGAs ‎[3,774 bytes]
345. (hist) ‎High Speed FPGA Trigger Logic for Particle Physics Experiments ‎[3,768 bytes]
346. (hist) ‎High-throughput Embedded System For Neurotechnology in collaboration with INI ‎[3,763 bytes]
347. (hist) ‎Event-based navigation on autonomous nano-drones ‎[3,759 bytes]
348. (hist) ‎Final Report ‎[3,757 bytes]
349. (hist) ‎Wearable Smart Camera With Deep Learning Algorithms For Automatic Detecion ‎[3,751 bytes]
350. (hist) ‎Template ‎[3,720 bytes]
351. (hist) ‎GPT on the edge ‎[3,702 bytes]
352. (hist) ‎LightProbe - Implementation of compressed-sensing algorithms ‎[3,700 bytes]
353. (hist) ‎Sub-Noise Floor Channel Tracking ‎[3,697 bytes]
354. (hist) ‎In-ear EEG signal acquisition ‎[3,696 bytes]
355. (hist) ‎Freedom from Interference in Heterogeneous COTS SoCs ‎[3,689 bytes]
356. (hist) ‎Adversarial Attacks Against Deep Neural Networks In Wearable Cameras ‎[3,681 bytes]
357. (hist) ‎Realtime Gaze Tracking on Siracusa ‎[3,669 bytes]
358. (hist) ‎A Novel Execution Scheme for Ultra-tiny CNNs Aboard Nano-UAVs ‎[3,668 bytes]
359. (hist) ‎Switched Capacitor Based Bandgap-Reference ‎[3,667 bytes]
360. (hist) ‎Design of Charge-Pump PLL in 22nm for 5G communication applications ‎[3,666 bytes]
361. (hist) ‎Investigation of Redox Processes in CBRAM ‎[3,664 bytes]
362. (hist) ‎Flexible Electronic Systems and Embedded Epidermal Devices ‎[3,636 bytes]
363. (hist) ‎Machine Learning Assisted Direct Synthesis of Passive Networks ‎[3,635 bytes]
364. (hist) ‎Analysis and Design of Power Efficient RF/ mm-Wave LC-tank Oscillator in 28nm for 5G communication applications ‎[3,628 bytes]
365. (hist) ‎Modular Distributed Data Collection Platform ‎[3,622 bytes]
366. (hist) ‎Writing a Hero runtime for EPAC (1-3S/B) ‎[3,620 bytes]
367. (hist) ‎Characterization of the susceptibility to cosmic radiation of wide bandgap power devices by radioactive sources and at cryogenic temperatures ‎[3,619 bytes]
368. (hist) ‎Desing and Implementation Of Long Lasting Key Finder With Bleetooth Low Energy ‎[3,597 bytes]
369. (hist) ‎3D Matrix Multiplication Unit for ITA (1S) ‎[3,582 bytes]
370. (hist) ‎Efficient Banded Matrix Multiplication for Quantum Transport Simulations ‎[3,572 bytes]
371. (hist) ‎NeuroSoC RISC-V Component (M/1-2S) ‎[3,567 bytes]
372. (hist) ‎Hardware/software co-programming on the Parallella platform ‎[3,565 bytes]
373. (hist) ‎Wearables for Sports and Life Enhancement ‎[3,562 bytes]
374. (hist) ‎ASIC Implementation of High-Throughput Next Generation Turbo Decoders ‎[3,562 bytes]
375. (hist) ‎Autonomous Mapping with Nano-Drones UWB and Novel Depth Sensors ‎[3,559 bytes]
376. (hist) ‎Big Data Analytics Benchmarks for Ara ‎[3,556 bytes]
377. (hist) ‎FFT HDL Code Generator for Multi-Antenna mmWave Communication ‎[3,553 bytes]
378. (hist) ‎Ultra Low Power Conversion Circuit For Batteryless Applications ‎[3,549 bytes]
379. (hist) ‎All the flavours of FFT on MemPool (1-2S/B) ‎[3,536 bytes]
380. (hist) ‎Turbo Equalization for Cellular IoT ‎[3,536 bytes]
381. (hist) ‎Indoor Positioning with Bluetooth ‎[3,531 bytes]
382. (hist) ‎Gomeza old project4 ‎[3,523 bytes]
383. (hist) ‎Runtime partitioning of L1 memory in Mempool (M) ‎[3,522 bytes]
384. (hist) ‎Neural Recording Interface and Spike Sorting Algorithm ‎[3,516 bytes]
385. (hist) ‎Real-Time Stereo to Multiview Conversion ‎[3,509 bytes]
386. (hist) ‎SCMI Support for Power Controller Subsystem ‎[3,507 bytes]
387. (hist) ‎FPGA-based Testbed Implementation of an Extended-Coverage Point-to-Point Communication Link for the Internet of Things ‎[3,491 bytes]
388. (hist) ‎Open Power-On Chip Controller Study and Integration ‎[3,490 bytes]
389. (hist) ‎Wearables in Fashion ‎[3,486 bytes]
390. (hist) ‎Resilient Brain-Inspired Hyperdimensional Computing Architectures ‎[3,480 bytes]
391. (hist) ‎Zephyr RTOS on PULP ‎[3,478 bytes]
392. (hist) ‎Exploration and Hardware Acceleration of Intra-Layer Mixed-Precision QNNs ‎[3,470 bytes]
393. (hist) ‎Routing 1000s of wires in Network-on-Chips (1-2S/M) ‎[3,457 bytes]
394. (hist) ‎Infrared Wake Up Radio ‎[3,454 bytes]
395. (hist) ‎Processing of 3D Micro-tomography data for Lithium Ion Batteries ‎[3,438 bytes]
396. (hist) ‎Hyper Meccano: Acceleration of Hyperdimensional Computing ‎[3,434 bytes]
397. (hist) ‎Cell Measurements for the 5G Internet of Things ‎[3,433 bytes]
398. (hist) ‎Hardware Accelerator for Model Predictive Controller ‎[3,433 bytes]
399. (hist) ‎Feature Extraction with Binarized Descriptors: ASIC Implementation and FPGA Environment ‎[3,425 bytes]
400. (hist) ‎Compiler Profiling and Optimizing ‎[3,423 bytes]
401. (hist) ‎Charge and heat transport through graphene nanoribbon based devices ‎[3,419 bytes]
402. (hist) ‎Real-time Linux on RISC-V ‎[3,402 bytes]
403. (hist) ‎FPGA mapping of RPC DRAM ‎[3,396 bytes]
404. (hist) ‎Control an external ADC using Programmable Real-Time Unit (PRU) Subsystem on Beaglebone Black used as embedded HPC-performance-monitoring device ‎[3,394 bytes]
405. (hist) ‎Low-power Clock Generation Solutions for 65nm Technology ‎[3,387 bytes]
406. (hist) ‎Ab-initio Simulation of Strained Thermoelectric Materials ‎[3,382 bytes]
407. (hist) ‎Accelerating Stencil Workloads on Snitch using ISSRs (1-2S/B) ‎[3,375 bytes]
408. (hist) ‎Low-power chip-to-chip communication network ‎[3,375 bytes]
409. (hist) ‎Extending the HERO RISC-V HPC stack to support multiple devices on heterogeneous SoCs (M/1-3S) ‎[3,370 bytes]
410. (hist) ‎Multi issue OoO Ariane Backend (M) ‎[3,365 bytes]
411. (hist) ‎A Wireless Sensor Network for a Smart LED Lighting control ‎[3,364 bytes]
412. (hist) ‎Next Generation Channel Decoder ‎[3,360 bytes]
413. (hist) ‎Building an RTL top level for a Mempool-based Heterogeneous SoC (M/1-3S) ‎[3,351 bytes]
414. (hist) ‎LTE IoT Network Synchronization ‎[3,346 bytes]
415. (hist) ‎Linux Driver for fine-grain and low overhead access to on-chip performance counters ‎[3,337 bytes]
416. (hist) ‎Simulation of Negative Capacitance Ferroelectric Transistor ‎[3,335 bytes]
417. (hist) ‎Ultra-High-Efficiency Power Supply Management for Ultra-Low-Power Systems on Chip ‎[3,329 bytes]
418. (hist) ‎VLSI Implementation of a 5G Ciphering Accelerator ‎[3,312 bytes]
419. (hist) ‎Neural Recording Interface and Signal Processing ‎[3,302 bytes]
420. (hist) ‎CLIC for the CVA6 ‎[3,299 bytes]
421. (hist) ‎Benchmarking RISC-V-based Accelerator Cards for Inference (multiple SA) ‎[3,265 bytes]
422. (hist) ‎Heterogeneous SoCs ‎[3,257 bytes]
423. (hist) ‎FPGA Optimizations of Dense Binary Hyperdimensional Computing ‎[3,251 bytes]
424. (hist) ‎Gomeza old project1 ‎[3,251 bytes]
425. (hist) ‎Design of combined Ultrasound and Electromyography systems ‎[3,250 bytes]
426. (hist) ‎Ultrasound-EMG combined hand gesture recognition ‎[3,248 bytes]
427. (hist) ‎High Performance Digitally-Assisted Time Domain ADC Design for DPLL used in Cellular IOT ‎[3,248 bytes]
428. (hist) ‎NORX - an AEAD algorithm for the CAESAR competition ‎[3,243 bytes]
429. (hist) ‎Using Motion Sensors to Support Indoor Localization ‎[3,236 bytes]
430. (hist) ‎Augmenting Our IPs with AXI Stream Extensions (M/1-2S) ‎[3,235 bytes]
431. (hist) ‎IoT Turbo Decoder ‎[3,235 bytes]
432. (hist) ‎FPGA Testbed Implementation for Bluetooth Indoor Positioning ‎[3,221 bytes]
433. (hist) ‎Advanced EEG glasses ‎[3,216 bytes]
434. (hist) ‎NextGenChannelDec ‎[3,196 bytes]
435. (hist) ‎Thermal Control of Mobile Devices ‎[3,195 bytes]
436. (hist) ‎PULP Freertos with LLVM ‎[3,185 bytes]
437. (hist) ‎Bateryless Heart Rate Monitoring ‎[3,181 bytes]
438. (hist) ‎Deep Learning for Brain-Computer Interface ‎[3,180 bytes]
439. (hist) ‎Engineering For Kids ‎[3,177 bytes]
440. (hist) ‎LightProbe - Frontend Firmware and Control Side Channel ‎[3,177 bytes]
441. (hist) ‎Satellite Internet of Things ‎[3,173 bytes]
442. (hist) ‎Implementation of a 2-D model for Li-ion batteries ‎[3,173 bytes]
443. (hist) ‎Efficient TNN compression ‎[3,170 bytes]
444. (hist) ‎Shared Correlation Accelerator for an RF SoC ‎[3,167 bytes]
445. (hist) ‎Digital Beamforming for Ultrasound Imaging ‎[3,167 bytes]
446. (hist) ‎EEG earbud ‎[3,161 bytes]
447. (hist) ‎Channel Estimation for 5G Cellular IoT and Fast Fading Channels ‎[3,153 bytes]
448. (hist) ‎Putting Together What Fits Together - GrÆStl ‎[3,145 bytes]
449. (hist) ‎Ultrasound measurement of microbubble stiffness for in situ detection of protease activity in clinical settings ‎[3,144 bytes]
450. (hist) ‎Autonomous Smart Watches: Hardware and Software Desing ‎[3,139 bytes]
451. (hist) ‎Finite Element Simulations of Transistors for Quantum Computing ‎[3,138 bytes]
452. (hist) ‎Enabling Efficient Systolic Execution on MemPool (M) ‎[3,130 bytes]
453. (hist) ‎Real-Time Pedestrian Detection For Privacy Enhancement ‎[3,130 bytes]
454. (hist) ‎Linux Driver for built-in ADC using DMA and Programmable Real-Time Unit (PRU) support on Beaglebone Black used as embedded HPC-performance-monitoring device ‎[3,114 bytes]
455. (hist) ‎Every individual on the planet should have a real chance to obtain personalized medical therapy ‎[3,103 bytes]
456. (hist) ‎FPGA System Design for Computer Vision with Convolutional Neural Networks ‎[3,100 bytes]
457. (hist) ‎Predict eye movement through brain activity ‎[3,095 bytes]
458. (hist) ‎Vector Processor for In-Memory Computing ‎[3,095 bytes]
459. (hist) ‎Development of an implantable Force sensor for orthopedic applications ‎[3,092 bytes]
460. (hist) ‎High Power Efficient Digitally Controlled Oscillator Design for Cellular IOT ‎[3,091 bytes]
461. (hist) ‎Hardware Accelerated Derivative Pricing ‎[3,088 bytes]
462. (hist) ‎Integration Of A Smart Vision System ‎[3,086 bytes]
463. (hist) ‎Event-Driven Vision on an embedded platform ‎[3,085 bytes]
464. (hist) ‎Ultrafast Medical Ultrasound imaging on a GPU ‎[3,084 bytes]
465. (hist) ‎Investigation of Metal Diffusion in Oxides for CBRAM Applications ‎[3,080 bytes]
466. (hist) ‎Development Of An FPGA-Based Optoacoustic Image Reconstruction Platform for Clinical Applications ‎[3,078 bytes]
467. (hist) ‎Efficient Search Design for Hyperdimensional Computing ‎[3,062 bytes]
468. (hist) ‎Exploring feature selection and classification algorithms for ultra-low-power closed-loop systems for epilepsy control ‎[3,058 bytes]
469. (hist) ‎Smart e-glasses for concealed recording of EEG signals ‎[3,040 bytes]
470. (hist) ‎VLSI Implementation Polar Decoder using High Level Synthesis ‎[3,039 bytes]
471. (hist) ‎A Flexible FPGA-Based Peripheral Platform Extending Linux-Capable Systems on Chip (1-3S/B) ‎[3,038 bytes]
472. (hist) ‎Exploring features and algorithms for ultra-low-power closed-loop systems for epilepsy control ‎[3,027 bytes]
473. (hist) ‎Andrea Cossettini ‎[3,011 bytes]
474. (hist) ‎VLSI Implementation of a Low-Complexity Channel Shortener for 2G EC-GSM-IoT and Evolved EDGE ‎[3,001 bytes]
475. (hist) ‎Variability Tolerant Ultra Low Power Cluster ‎[2,997 bytes]
476. (hist) ‎EEG-based drowsiness detection ‎[2,995 bytes]
477. (hist) ‎Advanced Data Movers for Modern Neural Networks ‎[2,983 bytes]
478. (hist) ‎Towards Self Sustainable UAVs ‎[2,970 bytes]
479. (hist) ‎Designing a Power Management Unit for PULP SoCs ‎[2,969 bytes]
480. (hist) ‎ASIC Development of 5G-NR LDPC Decoder ‎[2,960 bytes]
481. (hist) ‎Evaluating An Ultra low Power Vision Node ‎[2,958 bytes]
482. (hist) ‎High-Throughput Authenticated Encryption Architectures based on Block Ciphers ‎[2,957 bytes]
483. (hist) ‎Radiation Testing of a PULP ASIC ‎[2,955 bytes]
484. (hist) ‎Accelerators for object detection and tracking ‎[2,947 bytes]
485. (hist) ‎Circuits and Systems for Nanoelectrode Array Biosensors ‎[2,937 bytes]
486. (hist) ‎FPGA acceleration of ultrasound computed tomography for in vivo tumor screening ‎[2,923 bytes]
487. (hist) ‎Optimizing the Pipeline in our Floating Point Architectures (1S) ‎[2,922 bytes]
488. (hist) ‎An FPGA-Based Evaluation Platform for Mobile Communications ‎[2,920 bytes]
489. (hist) ‎Full-band simulations of InP/GaAsSb/InP Double Heterojunction Bipolar Transistors (DHBTs) ‎[2,916 bytes]
490. (hist) ‎Compressed Sensing Reconstruction on FPGA ‎[2,916 bytes]
491. (hist) ‎Evaluating The Use of Snitch In The PsPIN RISC-V In-network Accelerator (M) ‎[2,899 bytes]
492. (hist) ‎Hypervisor Extension for Ariane (M) ‎[2,896 bytes]
493. (hist) ‎Kinetic Energy Harvesting For Autonomous Smart Watches ‎[2,893 bytes]
494. (hist) ‎Wearable Ultrasound for Artery monitoring ‎[2,884 bytes]
495. (hist) ‎Time Synchronization for 3G Mobile Communications ‎[2,876 bytes]
496. (hist) ‎High-Speed SAR ADC for next generation wireless communication in 12nm FinFET ‎[2,874 bytes]
497. (hist) ‎StoneEDGE: An EC-GSM-IoT and Evolved EDGE PHY ASIC ‎[2,873 bytes]
498. (hist) ‎Developing High Efficiency Batteries for Electric Cars ‎[2,871 bytes]
499. (hist) ‎Testbed Design for Self-sustainable IoT Sensors ‎[2,870 bytes]
500. (hist) ‎Ultrasound High Speed Microbubble Tracking ‎[2,861 bytes]

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