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From iis-projects
Showing below up to 250 results in range #301 to #550.
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- (hist) Noise Figure Measurement for Cryogenic System [2,544 bytes]
- (hist) Ultra Low-Power Oscillator [2,548 bytes]
- (hist) Sandro Belfanti [2,554 bytes]
- (hist) Nanoscale Hybrid III-V Plasmonic Laser for Low-Power Photonic ICs [2,554 bytes]
- (hist) 4th Generation Synchronization [2,556 bytes]
- (hist) Stand-Alone Edge Computing with GAP8 [2,563 bytes]
- (hist) Neural Networks Framwork for Embedded Plattforms [2,569 bytes]
- (hist) High-Speed Digital-to-Analog Converter (DAC) for massive MIMO testing in 65nm CMOS [2,570 bytes]
- (hist) Design of Time-Encoded Spiking Neural Networks (IBM-Zurich) [2,589 bytes]
- (hist) Digital Transmitter for Cellular IoT [2,591 bytes]
- (hist) Ambient RF Energy harvesting for Wireless Sensor Network [2,592 bytes]
- (hist) LightProbe - Thermal-Power aware on-head Beamforming [2,593 bytes]
- (hist) Design of low-offset dynamic comparators [2,598 bytes]
- (hist) Data Mapping for Unreliable Memories [2,599 bytes]
- (hist) Battery indifferent wearable Ultrasound [2,602 bytes]
- (hist) Design of a VLIW processor architecture based on RISC-V [2,607 bytes]
- (hist) Minimal Cost RISC-V core [2,607 bytes]
- (hist) A RISC-V fault-tolerant many-core accelerator for 5G Non-Terrestrial Networks (1-2S/B) [2,607 bytes]
- (hist) Optimal routing for 2D Mesh-based Analog Compute-In-Memory Accelerator Architecture (IBM-Zurich) [2,609 bytes]
- (hist) Assessment of novel photovoltaic architectures by circuit simulation [2,613 bytes]
- (hist) DigitalUltrasoundHead [2,613 bytes]
- (hist) Network-on-Chip for coherent and non-coherent traffic (M) [2,613 bytes]
- (hist) High performance continuous-time Delta-Sigma ADC for magnetic resonance imaging [2,617 bytes]
- (hist) Investigation of the source starvation effect in III-V MOSFET [2,619 bytes]
- (hist) On-Board Software for PULP on a Satellite [2,619 bytes]
- (hist) Inductive Charging Circuit for Implantable Devices [2,622 bytes]
- (hist) Ultrasound based hand gesture recognition [2,626 bytes]
- (hist) A Wearable System for long term monitoring of human physiological parameters with E skin sensors [2,634 bytes]
- (hist) Charging System for Implantable Electronics [2,642 bytes]
- (hist) Energy Efficient SoCs [2,643 bytes]
- (hist) PVT Dynamic Adaptation in PULPv3 [2,644 bytes]
- (hist) CPS Software-Configurable State-Machine [2,649 bytes]
- (hist) Design of combined Ultrasound and PPG systems [2,650 bytes]
- (hist) Resource Partitioning of Caches [2,652 bytes]
- (hist) Pulse Oximetry Fachpraktikum [2,655 bytes]
- (hist) MatPHY: An Open-Source Physical Layer Development Framework [2,656 bytes]
- (hist) Design and Implementation of an Approximate Floating Point Unit [2,661 bytes]
- (hist) Application Specific Frequency Synthesizers (Analog/Digital PLLs) [2,667 bytes]
- (hist) An Efficient Compiler Backend for Snitch (1S/B) [2,667 bytes]
- (hist) Evaluating the RiscV Architecture [2,671 bytes]
- (hist) Gomeza old project5 [2,671 bytes]
- (hist) Learning Image Compression with Convolutional Networks [2,674 bytes]
- (hist) Digital Transmitter for Mobile Communications [2,679 bytes]
- (hist) Electrothermal characterization of van der Waals Heterostructures with a partial overlap [2,686 bytes]
- (hist) Design of an LTE Module for the Internet of Things [2,688 bytes]
- (hist) Image Sensor Interface and Pre-processing [2,695 bytes]
- (hist) Energy-efficient Circuits for Fully Wireless Brain-machine Interfaces [2,702 bytes]
- (hist) On-chip clock synthesizer design and porting [2,703 bytes]
- (hist) Simulation of Li-ion batteries and comparison with experimental data [2,705 bytes]
- (hist) Improving SystemVerilog Support for Free And Open-Source EDA Tools (1-3S/B) [2,710 bytes]
- (hist) Improving datarate and efficiency of ultra low power wearable ultrasound [2,711 bytes]
- (hist) Analog Compute-in-Memory Accelerator Interface and Integration [2,712 bytes]
- (hist) Quantum transport in 2D heterostructures [2,725 bytes]
- (hist) High performance continous-time Delta-Sigma ADC for biomedical applications [2,725 bytes]
- (hist) Advanced 5G Repetition Combining [2,727 bytes]
- (hist) Improved Reacquisition for the 5G Cellular IoT [2,733 bytes]
- (hist) Quantum Transport Modeling of Interband Cascade Lasers (ICL) [2,742 bytes]
- (hist) Design of Power-Noise-Efficient Discrete-Time Amplifier Using Open-Source Tools [2,743 bytes]
- (hist) Accelerator for Boosted Binary Features [2,755 bytes]
- (hist) Channel Estimation and Equalization for LTE Advanced [2,762 bytes]
- (hist) LightProbe - Design of a High-Speed Optical Link [2,767 bytes]
- (hist) Wireless EEG Acquisition and Processing [2,769 bytes]
- (hist) Design of MEMs Sensor Interface [2,771 bytes]
- (hist) Spatio-Temporal Video Filtering [2,778 bytes]
- (hist) CMOS power amplifier for field measurements in MRI systems [2,781 bytes]
- (hist) Reading The GSM Beacon Carrier with OsmocomBB and stoneEDGE [2,783 bytes]
- (hist) Smart Meters [2,783 bytes]
- (hist) Power Optimization in Multipliers [2,785 bytes]
- (hist) Design study of tunneling transistors based on a core/shell nanowire structures [2,789 bytes]
- (hist) Wireless Communication Systems for the IoT [2,790 bytes]
- (hist) Benchmarking a RISC-V-based Server on LLMs/Foundation Models (SA or MA) [2,793 bytes]
- (hist) Resource Partitioning of RPC DRAM [2,796 bytes]
- (hist) Automatic unplugging detection for Ultrasound probes [2,797 bytes]
- (hist) Jammer Mitigation Meets Machine Learning [2,797 bytes]
- (hist) Bandwidth Extension with Carrier Aggregation for Mobile Gigabit-Communication [2,801 bytes]
- (hist) Design of Streaming Data Platform for High-Speed ADC Data [2,801 bytes]
- (hist) Gomeza old project3 [2,806 bytes]
- (hist) Design of a 25 Gbps SerDes for optical chip-to-chip communication [2,809 bytes]
- (hist) 3D Turbo Decoder ASIC Realization [2,810 bytes]
- (hist) Ultrasound Doppler system development [2,813 bytes]
- (hist) Analog [2,818 bytes]
- (hist) Coherence-Capable Write-Back L1 Data Cache for Ariane (M) [2,818 bytes]
- (hist) Accelerator for Spatio-Temporal Video Filtering [2,819 bytes]
- (hist) Gomeza old project2 [2,821 bytes]
- (hist) Ultra low power wearable ultrasound probe [2,821 bytes]
- (hist) Next Generation Synchronization Signals [2,827 bytes]
- (hist) Enhancing our DMA Engine with Vector Processing Capabilities (1-2S/B) [2,829 bytes]
- (hist) An Energy Efficient Brain-Computer Interface using Mr.Wolf [2,830 bytes]
- (hist) Implementing Hibernation on the ARM Cortex M0 [2,831 bytes]
- (hist) Ternary Neural Networks for Face Recognition [2,831 bytes]
- (hist) Computation of Phonon Bandstructure in III-V Nanostructures [2,836 bytes]
- (hist) Investigation of the high-performance multi-threaded OoO IBM A2O Core (1-3S) [2,846 bytes]
- (hist) Evolved EDGE Physical Layer Incremental Redundancy Architecture [2,848 bytes]
- (hist) Signal-Processing and Data-Compression on Beaglebone Black used as embedded HPC-performance-monitoring device [2,851 bytes]
- (hist) Minimum Variance Beamforming for Wearable Ultrasound Probes [2,858 bytes]
- (hist) Ultrasound High Speed Microbubble Tracking [2,861 bytes]
- (hist) Testbed Design for Self-sustainable IoT Sensors [2,870 bytes]
- (hist) Developing High Efficiency Batteries for Electric Cars [2,871 bytes]
- (hist) StoneEDGE: An EC-GSM-IoT and Evolved EDGE PHY ASIC [2,873 bytes]
- (hist) High-Speed SAR ADC for next generation wireless communication in 12nm FinFET [2,874 bytes]
- (hist) Time Synchronization for 3G Mobile Communications [2,876 bytes]
- (hist) Wearable Ultrasound for Artery monitoring [2,884 bytes]
- (hist) Kinetic Energy Harvesting For Autonomous Smart Watches [2,893 bytes]
- (hist) Hypervisor Extension for Ariane (M) [2,896 bytes]
- (hist) Evaluating The Use of Snitch In The PsPIN RISC-V In-network Accelerator (M) [2,899 bytes]
- (hist) Compressed Sensing Reconstruction on FPGA [2,916 bytes]
- (hist) Full-band simulations of InP/GaAsSb/InP Double Heterojunction Bipolar Transistors (DHBTs) [2,916 bytes]
- (hist) An FPGA-Based Evaluation Platform for Mobile Communications [2,920 bytes]
- (hist) Optimizing the Pipeline in our Floating Point Architectures (1S) [2,922 bytes]
- (hist) FPGA acceleration of ultrasound computed tomography for in vivo tumor screening [2,923 bytes]
- (hist) Circuits and Systems for Nanoelectrode Array Biosensors [2,937 bytes]
- (hist) Accelerators for object detection and tracking [2,947 bytes]
- (hist) Radiation Testing of a PULP ASIC [2,955 bytes]
- (hist) High-Throughput Authenticated Encryption Architectures based on Block Ciphers [2,957 bytes]
- (hist) Evaluating An Ultra low Power Vision Node [2,958 bytes]
- (hist) ASIC Development of 5G-NR LDPC Decoder [2,960 bytes]
- (hist) Designing a Power Management Unit for PULP SoCs [2,969 bytes]
- (hist) Towards Self Sustainable UAVs [2,970 bytes]
- (hist) Andrea Cossettini [2,977 bytes]
- (hist) Advanced Data Movers for Modern Neural Networks [2,983 bytes]
- (hist) EEG-based drowsiness detection [2,995 bytes]
- (hist) Variability Tolerant Ultra Low Power Cluster [2,997 bytes]
- (hist) VLSI Implementation of a Low-Complexity Channel Shortener for 2G EC-GSM-IoT and Evolved EDGE [3,001 bytes]
- (hist) Exploring features and algorithms for ultra-low-power closed-loop systems for epilepsy control [3,027 bytes]
- (hist) A Flexible FPGA-Based Peripheral Platform Extending Linux-Capable Systems on Chip (1-3S/B) [3,038 bytes]
- (hist) VLSI Implementation Polar Decoder using High Level Synthesis [3,039 bytes]
- (hist) Smart e-glasses for concealed recording of EEG signals [3,040 bytes]
- (hist) Exploring feature selection and classification algorithms for ultra-low-power closed-loop systems for epilepsy control [3,058 bytes]
- (hist) Efficient Search Design for Hyperdimensional Computing [3,062 bytes]
- (hist) Development Of An FPGA-Based Optoacoustic Image Reconstruction Platform for Clinical Applications [3,078 bytes]
- (hist) Investigation of Metal Diffusion in Oxides for CBRAM Applications [3,080 bytes]
- (hist) Ultrafast Medical Ultrasound imaging on a GPU [3,084 bytes]
- (hist) Event-Driven Vision on an embedded platform [3,085 bytes]
- (hist) Integration Of A Smart Vision System [3,086 bytes]
- (hist) Hardware Accelerated Derivative Pricing [3,088 bytes]
- (hist) High Power Efficient Digitally Controlled Oscillator Design for Cellular IOT [3,091 bytes]
- (hist) Development of an implantable Force sensor for orthopedic applications [3,092 bytes]
- (hist) Vector Processor for In-Memory Computing [3,095 bytes]
- (hist) Predict eye movement through brain activity [3,095 bytes]
- (hist) FPGA System Design for Computer Vision with Convolutional Neural Networks [3,100 bytes]
- (hist) Every individual on the planet should have a real chance to obtain personalized medical therapy [3,103 bytes]
- (hist) Linux Driver for built-in ADC using DMA and Programmable Real-Time Unit (PRU) support on Beaglebone Black used as embedded HPC-performance-monitoring device [3,114 bytes]
- (hist) Real-Time Pedestrian Detection For Privacy Enhancement [3,130 bytes]
- (hist) Enabling Efficient Systolic Execution on MemPool (M) [3,130 bytes]
- (hist) Finite Element Simulations of Transistors for Quantum Computing [3,138 bytes]
- (hist) Autonomous Smart Watches: Hardware and Software Desing [3,139 bytes]
- (hist) Ultrasound measurement of microbubble stiffness for in situ detection of protease activity in clinical settings [3,144 bytes]
- (hist) Putting Together What Fits Together - GrÆStl [3,145 bytes]
- (hist) Channel Estimation for 5G Cellular IoT and Fast Fading Channels [3,153 bytes]
- (hist) EEG earbud [3,161 bytes]
- (hist) Digital Beamforming for Ultrasound Imaging [3,167 bytes]
- (hist) Shared Correlation Accelerator for an RF SoC [3,167 bytes]
- (hist) Efficient TNN compression [3,170 bytes]
- (hist) Implementation of a 2-D model for Li-ion batteries [3,173 bytes]
- (hist) Satellite Internet of Things [3,173 bytes]
- (hist) LightProbe - Frontend Firmware and Control Side Channel [3,177 bytes]
- (hist) Engineering For Kids [3,177 bytes]
- (hist) Deep Learning for Brain-Computer Interface [3,180 bytes]
- (hist) Bateryless Heart Rate Monitoring [3,181 bytes]
- (hist) PULP Freertos with LLVM [3,185 bytes]
- (hist) Thermal Control of Mobile Devices [3,195 bytes]
- (hist) NextGenChannelDec [3,196 bytes]
- (hist) Low-Power Environmental Sensing [3,205 bytes]
- (hist) Advanced EEG glasses [3,216 bytes]
- (hist) FPGA Testbed Implementation for Bluetooth Indoor Positioning [3,221 bytes]
- (hist) IoT Turbo Decoder [3,235 bytes]
- (hist) Augmenting Our IPs with AXI Stream Extensions (M/1-2S) [3,235 bytes]
- (hist) Using Motion Sensors to Support Indoor Localization [3,236 bytes]
- (hist) NORX - an AEAD algorithm for the CAESAR competition [3,243 bytes]
- (hist) Ultrasound-EMG combined hand gesture recognition [3,244 bytes]
- (hist) High Performance Digitally-Assisted Time Domain ADC Design for DPLL used in Cellular IOT [3,248 bytes]
- (hist) Design of combined Ultrasound and Electromyography systems [3,250 bytes]
- (hist) Gomeza old project1 [3,251 bytes]
- (hist) FPGA Optimizations of Dense Binary Hyperdimensional Computing [3,251 bytes]
- (hist) Heterogeneous SoCs [3,257 bytes]
- (hist) Benchmarking RISC-V-based Accelerator Cards for Inference (multiple SA) [3,265 bytes]
- (hist) CLIC for the CVA6 [3,299 bytes]
- (hist) Neural Recording Interface and Signal Processing [3,302 bytes]
- (hist) VLSI Implementation of a 5G Ciphering Accelerator [3,312 bytes]
- (hist) Ultra-High-Efficiency Power Supply Management for Ultra-Low-Power Systems on Chip [3,329 bytes]
- (hist) Simulation of Negative Capacitance Ferroelectric Transistor [3,335 bytes]
- (hist) Linux Driver for fine-grain and low overhead access to on-chip performance counters [3,337 bytes]
- (hist) LTE IoT Network Synchronization [3,346 bytes]
- (hist) Building an RTL top level for a Mempool-based Heterogeneous SoC (M/1-3S) [3,351 bytes]
- (hist) Next Generation Channel Decoder [3,360 bytes]
- (hist) A Wireless Sensor Network for a Smart LED Lighting control [3,364 bytes]
- (hist) Multi issue OoO Ariane Backend (M) [3,365 bytes]
- (hist) Extending the HERO RISC-V HPC stack to support multiple devices on heterogeneous SoCs (M/1-3S) [3,370 bytes]
- (hist) Low-power chip-to-chip communication network [3,375 bytes]
- (hist) Accelerating Stencil Workloads on Snitch using ISSRs (1-2S/B) [3,375 bytes]
- (hist) Ab-initio Simulation of Strained Thermoelectric Materials [3,382 bytes]
- (hist) Low-power Clock Generation Solutions for 65nm Technology [3,387 bytes]
- (hist) Control an external ADC using Programmable Real-Time Unit (PRU) Subsystem on Beaglebone Black used as embedded HPC-performance-monitoring device [3,394 bytes]
- (hist) FPGA mapping of RPC DRAM [3,396 bytes]
- (hist) Real-time Linux on RISC-V [3,402 bytes]
- (hist) Charge and heat transport through graphene nanoribbon based devices [3,419 bytes]
- (hist) Compiler Profiling and Optimizing [3,423 bytes]
- (hist) Feature Extraction with Binarized Descriptors: ASIC Implementation and FPGA Environment [3,425 bytes]
- (hist) Hardware Accelerator for Model Predictive Controller [3,433 bytes]
- (hist) Cell Measurements for the 5G Internet of Things [3,433 bytes]
- (hist) Hyper Meccano: Acceleration of Hyperdimensional Computing [3,434 bytes]
- (hist) Processing of 3D Micro-tomography data for Lithium Ion Batteries [3,438 bytes]
- (hist) Infrared Wake Up Radio [3,454 bytes]
- (hist) Routing 1000s of wires in Network-on-Chips (1-2S/M) [3,457 bytes]
- (hist) Exploration and Hardware Acceleration of Intra-Layer Mixed-Precision QNNs [3,470 bytes]
- (hist) Zephyr RTOS on PULP [3,478 bytes]
- (hist) Structural Health Monitoring (SHM) System (1-2S/M) [3,478 bytes]
- (hist) Resilient Brain-Inspired Hyperdimensional Computing Architectures [3,480 bytes]
- (hist) Wearables in Fashion [3,486 bytes]
- (hist) Open Power-On Chip Controller Study and Integration [3,490 bytes]
- (hist) FPGA-based Testbed Implementation of an Extended-Coverage Point-to-Point Communication Link for the Internet of Things [3,491 bytes]
- (hist) SCMI Support for Power Controller Subsystem [3,507 bytes]
- (hist) Real-Time Stereo to Multiview Conversion [3,509 bytes]
- (hist) Neural Recording Interface and Spike Sorting Algorithm [3,516 bytes]
- (hist) Runtime partitioning of L1 memory in Mempool (M) [3,522 bytes]
- (hist) Gomeza old project4 [3,523 bytes]
- (hist) Indoor Positioning with Bluetooth [3,531 bytes]
- (hist) Turbo Equalization for Cellular IoT [3,536 bytes]
- (hist) All the flavours of FFT on MemPool (1-2S/B) [3,536 bytes]
- (hist) Ultra Low Power Conversion Circuit For Batteryless Applications [3,549 bytes]
- (hist) FFT HDL Code Generator for Multi-Antenna mmWave Communication [3,553 bytes]
- (hist) Big Data Analytics Benchmarks for Ara [3,556 bytes]
- (hist) Autonomous Mapping with Nano-Drones UWB and Novel Depth Sensors [3,559 bytes]
- (hist) ASIC Implementation of High-Throughput Next Generation Turbo Decoders [3,562 bytes]
- (hist) Wearables for Sports and Life Enhancement [3,562 bytes]
- (hist) Hardware/software co-programming on the Parallella platform [3,565 bytes]
- (hist) NeuroSoC RISC-V Component (M/1-2S) [3,567 bytes]
- (hist) Efficient Banded Matrix Multiplication for Quantum Transport Simulations [3,572 bytes]
- (hist) 3D Matrix Multiplication Unit for ITA (1S) [3,582 bytes]
- (hist) Desing and Implementation Of Long Lasting Key Finder With Bleetooth Low Energy [3,597 bytes]
- (hist) Characterization of the susceptibility to cosmic radiation of wide bandgap power devices by radioactive sources and at cryogenic temperatures [3,619 bytes]
- (hist) Writing a Hero runtime for EPAC (1-3S/B) [3,620 bytes]
- (hist) Modular Distributed Data Collection Platform [3,622 bytes]
- (hist) Analysis and Design of Power Efficient RF/ mm-Wave LC-tank Oscillator in 28nm for 5G communication applications [3,628 bytes]
- (hist) Machine Learning Assisted Direct Synthesis of Passive Networks [3,635 bytes]
- (hist) Flexible Electronic Systems and Embedded Epidermal Devices [3,636 bytes]
- (hist) Air Quality Prediction in Office Rooms (1-2S/M) [3,662 bytes]
- (hist) Investigation of Redox Processes in CBRAM [3,664 bytes]
- (hist) Design of Charge-Pump PLL in 22nm for 5G communication applications [3,666 bytes]
- (hist) Switched Capacitor Based Bandgap-Reference [3,667 bytes]
- (hist) A Novel Execution Scheme for Ultra-tiny CNNs Aboard Nano-UAVs [3,668 bytes]
- (hist) Realtime Gaze Tracking on Siracusa [3,669 bytes]
- (hist) Adversarial Attacks Against Deep Neural Networks In Wearable Cameras [3,681 bytes]
- (hist) Freedom from Interference in Heterogeneous COTS SoCs [3,689 bytes]
- (hist) In-ear EEG signal acquisition [3,696 bytes]
- (hist) Sub-Noise Floor Channel Tracking [3,697 bytes]
- (hist) LightProbe - Implementation of compressed-sensing algorithms [3,700 bytes]
- (hist) GPT on the edge [3,702 bytes]
- (hist) Template [3,720 bytes]
- (hist) Wearable Smart Camera With Deep Learning Algorithms For Automatic Detecion [3,751 bytes]