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Showing below up to 250 results in range #251 to #500.

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  1. (hist) ‎Event-Driven Convolutional Neural Network Modular Accelerator ‎[4,511 bytes]
  2. (hist) ‎IP-Based SoC Generation and Configuration (1-3S/B) ‎[4,509 bytes]
  3. (hist) ‎Low-Complexity MIMO Detection ‎[4,502 bytes]
  4. (hist) ‎Characterization techniques for silicon photonics-Lumiphase ‎[4,501 bytes]
  5. (hist) ‎Low Resolution Neural Networks ‎[4,495 bytes]
  6. (hist) ‎Radio Signal Direction Detection For Smart Glasses For Augmented Reality Applications ‎[4,486 bytes]
  7. (hist) ‎Softmax for Transformers (M/1-2S) ‎[4,481 bytes]
  8. (hist) ‎Embedded Artificial Intelligence:Systems And Applications ‎[4,477 bytes]
  9. (hist) ‎Wearables for Sports and Fitness Tracking ‎[4,473 bytes]
  10. (hist) ‎Design space exploration of InP Heterojunction Bipolar Transistors (DHBTs) ‎[4,457 bytes]
  11. (hist) ‎Covariant Feature Detector on Parallel Ultra Low Power Architecture ‎[4,449 bytes]
  12. (hist) ‎PULPonFPGA: Lightweight Virtual Memory Support - Coherency Extensions ‎[4,449 bytes]
  13. (hist) ‎Spiking Neural Network for Autonomous Navigation ‎[4,446 bytes]
  14. (hist) ‎Integrating Hardware Accelerators into Snitch (1S) ‎[4,435 bytes]
  15. (hist) ‎NAND Flash Open Research Platform ‎[4,406 bytes]
  16. (hist) ‎Real-Time ECG Contractions Classification ‎[4,389 bytes]
  17. (hist) ‎Data Augmentation Techniques in Biosignal Classification ‎[4,358 bytes]
  18. (hist) ‎Zero Power Touch Sensor and Reciever For Body Communication ‎[4,357 bytes]
  19. (hist) ‎System Emulation for AR and VR devices ‎[4,347 bytes]
  20. (hist) ‎Extend the RI5CY core with priviledge extensions ‎[4,337 bytes]
  21. (hist) ‎Flexfloat DL Training Framework ‎[4,334 bytes]
  22. (hist) ‎Integrated silicon photonic structures ‎[4,327 bytes]
  23. (hist) ‎Low Latency Brain-Machine Interfaces ‎[4,326 bytes]
  24. (hist) ‎Integrated silicon photonic structures-Lumiphase ‎[4,317 bytes]
  25. (hist) ‎Low-power time synchronization for IoT applications ‎[4,316 bytes]
  26. (hist) ‎Probabilistic training algorithms for quantized neural networks ‎[4,315 bytes]
  27. (hist) ‎Ultra-Efficient Visual Classification on Movidius Myriad2 ‎[4,313 bytes]
  28. (hist) ‎Efficient Digital Signal Processing in High-Channel-Count High-Frame-Rate 3D Ultrasound Imaging Systems ‎[4,311 bytes]
  29. (hist) ‎Optogenetics And Game Theory Applied To Small Side Bird Using Smart Sensing ‎[4,310 bytes]
  30. (hist) ‎ASIC implementation of an interpolation-based wideband massive MIMO detector ‎[4,308 bytes]
  31. (hist) ‎Network-off-Chip (M) ‎[4,302 bytes]
  32. (hist) ‎Autonomous Obstacle Avoidance with Nano-Drones and Novel Depth Sensors ‎[4,300 bytes]
  33. (hist) ‎Ultra-wideband Concurrent Ranging ‎[4,295 bytes]
  34. (hist) ‎OTDOA Positioning for LTE Cat-M ‎[4,289 bytes]
  35. (hist) ‎Ara: Update PULP's Vector Processor with the recent RISC-V Vector Extension Development ‎[4,285 bytes]
  36. (hist) ‎PULPonFPGA: Lightweight Virtual Memory Support - Multi-Level TLB ‎[4,280 bytes]
  37. (hist) ‎A computational memory unit using phase-change memory devices ‎[4,257 bytes]
  38. (hist) ‎Birds Long Term Monitoring With Ultra Low Power Wireless Sensor Node ‎[4,251 bytes]
  39. (hist) ‎Implementation of a NB-IoT Positioning System ‎[4,245 bytes]
  40. (hist) ‎Deep Learning-based Global Local Planner for Autonomous Nano-drones ‎[4,243 bytes]
  41. (hist) ‎Physical Implementation of ITA (2S) ‎[4,240 bytes]
  42. (hist) ‎Subject specific embeddings for transfer learning in brain-computer interfaces ‎[4,230 bytes]
  43. (hist) ‎Design of a High-​performance Hybrid PTZ for Multimodal Vision Systems ‎[4,220 bytes]
  44. (hist) ‎Improved Collision Avoidance for Nano-drones ‎[4,218 bytes]
  45. (hist) ‎A Unified Compute Kernel Library for Snitch (1-2S) ‎[4,218 bytes]
  46. (hist) ‎Creating a HDMI Video Interface for PULP ‎[4,212 bytes]
  47. (hist) ‎EEG artifact detection with machine learning ‎[4,211 bytes]
  48. (hist) ‎Efficient Memory Stream Handling in RISC-V-based Systems (M/1-2S) ‎[4,183 bytes]
  49. (hist) ‎Physics is looking for PULP ‎[4,170 bytes]
  50. (hist) ‎Scattering Networks for Scene Labeling ‎[4,163 bytes]
  51. (hist) ‎A Wireless Sensor Network for a Smart Building Monitor and Control ‎[4,148 bytes]
  52. (hist) ‎Forward error-correction ASIC using GRAND ‎[4,141 bytes]
  53. (hist) ‎New RVV 1.0 Vector Instructions for Ara ‎[4,140 bytes]
  54. (hist) ‎Efficient Execution of Transformers in RISC-V Vector Machines with Custom HW acceleration (M) ‎[4,135 bytes]
  55. (hist) ‎Passive and Self Sustaining Receivers For On and Intra Body Communication For Wearable Sensors Networks ‎[4,132 bytes]
  56. (hist) ‎Ultra Low Power Wake Up Radio for Wireless Sensor Network ‎[4,116 bytes]
  57. (hist) ‎Internet of Things Network Synchronizer ‎[4,097 bytes]
  58. (hist) ‎Modeling FlooNoC in GVSoC (S/M) ‎[4,093 bytes]
  59. (hist) ‎Advanced Physical Design: Reinforcement Learning for Macro Placement and Mix-Placer (B/1-2S) ‎[4,090 bytes]
  60. (hist) ‎Optimal System Duty Cycling for a Mobile Health Platform ‎[4,070 bytes]
  61. (hist) ‎IcySoC ‎[4,070 bytes]
  62. (hist) ‎Design of a Low Power Smart Sensing Multi-modal Vision Platform ‎[4,069 bytes]
  63. (hist) ‎Software-Defined Paging in the Snitch Cluster (2-3S) ‎[4,036 bytes]
  64. (hist) ‎Implementation of the RISC-V Bit Manipulation (RVB) extensions for our RISC-V core ‎[4,019 bytes]
  65. (hist) ‎Hardware/software codesign neural decoding algorithm for “neural dust” ‎[4,005 bytes]
  66. (hist) ‎Design of an on-field adaptable pulse-processing unit for semicondutor radiation detectors ‎[4,002 bytes]
  67. (hist) ‎Unconventional phase change memory device concepts for in-memory and neuromorphic computin ‎[4,001 bytes]
  68. (hist) ‎Android reliability governor ‎[3,997 bytes]
  69. (hist) ‎Design of a CAN Interface to Enable Reliable Sensors-to-Processors Communication for Automotive-oriented Embedded Applications (1M) ‎[3,975 bytes]
  70. (hist) ‎Bandwidth Efficient NEureka ‎[3,968 bytes]
  71. (hist) ‎Finite element modeling of electrochemical random access memory ‎[3,967 bytes]
  72. (hist) ‎Low Power One bit Microphone for Acoustic Imaging Using A Parallel Processor ‎[3,967 bytes]
  73. (hist) ‎PULP’s CLIC extensions for fast interrupt handling ‎[3,953 bytes]
  74. (hist) ‎A Multiview Synthesis Core in 65 nm CMOS ‎[3,896 bytes]
  75. (hist) ‎PREM Intervals and Loop Tiling ‎[3,888 bytes]
  76. (hist) ‎A Recurrent Neural Network Speech Recognition Chip ‎[3,884 bytes]
  77. (hist) ‎Completed ‎[3,883 bytes]
  78. (hist) ‎Energy-Efficient Brain-Inspired Hyperdimensional Computing ‎[3,880 bytes]
  79. (hist) ‎Time and Frequency Synchronization in LTE Cat-0 Devices ‎[3,870 bytes]
  80. (hist) ‎Implementing Configurable Dual-Core Redundancy ‎[3,867 bytes]
  81. (hist) ‎RVfplib ‎[3,867 bytes]
  82. (hist) ‎SmartRing ‎[3,866 bytes]
  83. (hist) ‎Implementation of the RISC-V Bit Manipulation (RVB) extensions for our RI5CY core ‎[3,856 bytes]
  84. (hist) ‎Real-Time Embedded Systems ‎[3,849 bytes]
  85. (hist) ‎Development of a fingertip blood pressure sensor ‎[3,837 bytes]
  86. (hist) ‎Object Detection and Tracking on the Edge ‎[3,829 bytes]
  87. (hist) ‎Low Precision Ara for ML ‎[3,826 bytes]
  88. (hist) ‎Non-blocking Algorithms in Real-Time Operating Systems ‎[3,820 bytes]
  89. (hist) ‎Autonomous Smart Watches: Toward an ultra low power microphone detector with events classification ‎[3,798 bytes]
  90. (hist) ‎Design Of A Biomarker Assay Based On Responsive Magnetic Nanoparticles ‎[3,795 bytes]
  91. (hist) ‎Real-time View Synthesis using Image Domain Warping ‎[3,792 bytes]
  92. (hist) ‎Streaming Layer Normalization in ITA (M/1-2S) ‎[3,785 bytes]
  93. (hist) ‎Design and Exploitation of a Test-Bench for Non-Destructive Characterization of the Susceptibility of Silicon Carbide (SiC) Power Devices to Cosmic Radiation ‎[3,776 bytes]
  94. (hist) ‎Efficient Implementation of an Active-Set QP Solver for FPGAs ‎[3,774 bytes]
  95. (hist) ‎High Speed FPGA Trigger Logic for Particle Physics Experiments ‎[3,768 bytes]
  96. (hist) ‎High-throughput Embedded System For Neurotechnology in collaboration with INI ‎[3,763 bytes]
  97. (hist) ‎Event-based navigation on autonomous nano-drones ‎[3,759 bytes]
  98. (hist) ‎Final Report ‎[3,757 bytes]
  99. (hist) ‎Wearable Smart Camera With Deep Learning Algorithms For Automatic Detecion ‎[3,751 bytes]
  100. (hist) ‎Template ‎[3,720 bytes]
  101. (hist) ‎GPT on the edge ‎[3,702 bytes]
  102. (hist) ‎LightProbe - Implementation of compressed-sensing algorithms ‎[3,700 bytes]
  103. (hist) ‎Sub-Noise Floor Channel Tracking ‎[3,697 bytes]
  104. (hist) ‎In-ear EEG signal acquisition ‎[3,696 bytes]
  105. (hist) ‎Freedom from Interference in Heterogeneous COTS SoCs ‎[3,689 bytes]
  106. (hist) ‎Adversarial Attacks Against Deep Neural Networks In Wearable Cameras ‎[3,681 bytes]
  107. (hist) ‎Realtime Gaze Tracking on Siracusa ‎[3,669 bytes]
  108. (hist) ‎A Novel Execution Scheme for Ultra-tiny CNNs Aboard Nano-UAVs ‎[3,668 bytes]
  109. (hist) ‎Switched Capacitor Based Bandgap-Reference ‎[3,667 bytes]
  110. (hist) ‎Design of Charge-Pump PLL in 22nm for 5G communication applications ‎[3,666 bytes]
  111. (hist) ‎Investigation of Redox Processes in CBRAM ‎[3,664 bytes]
  112. (hist) ‎Flexible Electronic Systems and Embedded Epidermal Devices ‎[3,636 bytes]
  113. (hist) ‎Machine Learning Assisted Direct Synthesis of Passive Networks ‎[3,635 bytes]
  114. (hist) ‎Analysis and Design of Power Efficient RF/ mm-Wave LC-tank Oscillator in 28nm for 5G communication applications ‎[3,628 bytes]
  115. (hist) ‎Modular Distributed Data Collection Platform ‎[3,622 bytes]
  116. (hist) ‎Writing a Hero runtime for EPAC (1-3S/B) ‎[3,620 bytes]
  117. (hist) ‎Characterization of the susceptibility to cosmic radiation of wide bandgap power devices by radioactive sources and at cryogenic temperatures ‎[3,619 bytes]
  118. (hist) ‎Desing and Implementation Of Long Lasting Key Finder With Bleetooth Low Energy ‎[3,597 bytes]
  119. (hist) ‎3D Matrix Multiplication Unit for ITA (1S) ‎[3,582 bytes]
  120. (hist) ‎Efficient Banded Matrix Multiplication for Quantum Transport Simulations ‎[3,572 bytes]
  121. (hist) ‎NeuroSoC RISC-V Component (M/1-2S) ‎[3,567 bytes]
  122. (hist) ‎Hardware/software co-programming on the Parallella platform ‎[3,565 bytes]
  123. (hist) ‎Wearables for Sports and Life Enhancement ‎[3,562 bytes]
  124. (hist) ‎ASIC Implementation of High-Throughput Next Generation Turbo Decoders ‎[3,562 bytes]
  125. (hist) ‎Autonomous Mapping with Nano-Drones UWB and Novel Depth Sensors ‎[3,559 bytes]
  126. (hist) ‎Big Data Analytics Benchmarks for Ara ‎[3,556 bytes]
  127. (hist) ‎FFT HDL Code Generator for Multi-Antenna mmWave Communication ‎[3,553 bytes]
  128. (hist) ‎Ultra Low Power Conversion Circuit For Batteryless Applications ‎[3,549 bytes]
  129. (hist) ‎All the flavours of FFT on MemPool (1-2S/B) ‎[3,536 bytes]
  130. (hist) ‎Turbo Equalization for Cellular IoT ‎[3,536 bytes]
  131. (hist) ‎Indoor Positioning with Bluetooth ‎[3,531 bytes]
  132. (hist) ‎Gomeza old project4 ‎[3,523 bytes]
  133. (hist) ‎Runtime partitioning of L1 memory in Mempool (M) ‎[3,522 bytes]
  134. (hist) ‎Neural Recording Interface and Spike Sorting Algorithm ‎[3,516 bytes]
  135. (hist) ‎Real-Time Stereo to Multiview Conversion ‎[3,509 bytes]
  136. (hist) ‎SCMI Support for Power Controller Subsystem ‎[3,507 bytes]
  137. (hist) ‎FPGA-based Testbed Implementation of an Extended-Coverage Point-to-Point Communication Link for the Internet of Things ‎[3,491 bytes]
  138. (hist) ‎Open Power-On Chip Controller Study and Integration ‎[3,490 bytes]
  139. (hist) ‎Wearables in Fashion ‎[3,486 bytes]
  140. (hist) ‎Resilient Brain-Inspired Hyperdimensional Computing Architectures ‎[3,480 bytes]
  141. (hist) ‎Zephyr RTOS on PULP ‎[3,478 bytes]
  142. (hist) ‎Exploration and Hardware Acceleration of Intra-Layer Mixed-Precision QNNs ‎[3,470 bytes]
  143. (hist) ‎Routing 1000s of wires in Network-on-Chips (1-2S/M) ‎[3,457 bytes]
  144. (hist) ‎Infrared Wake Up Radio ‎[3,454 bytes]
  145. (hist) ‎Processing of 3D Micro-tomography data for Lithium Ion Batteries ‎[3,438 bytes]
  146. (hist) ‎Hyper Meccano: Acceleration of Hyperdimensional Computing ‎[3,434 bytes]
  147. (hist) ‎Cell Measurements for the 5G Internet of Things ‎[3,433 bytes]
  148. (hist) ‎Hardware Accelerator for Model Predictive Controller ‎[3,433 bytes]
  149. (hist) ‎Feature Extraction with Binarized Descriptors: ASIC Implementation and FPGA Environment ‎[3,425 bytes]
  150. (hist) ‎Compiler Profiling and Optimizing ‎[3,423 bytes]
  151. (hist) ‎Charge and heat transport through graphene nanoribbon based devices ‎[3,419 bytes]
  152. (hist) ‎Real-time Linux on RISC-V ‎[3,402 bytes]
  153. (hist) ‎FPGA mapping of RPC DRAM ‎[3,396 bytes]
  154. (hist) ‎Control an external ADC using Programmable Real-Time Unit (PRU) Subsystem on Beaglebone Black used as embedded HPC-performance-monitoring device ‎[3,394 bytes]
  155. (hist) ‎Low-power Clock Generation Solutions for 65nm Technology ‎[3,387 bytes]
  156. (hist) ‎Ab-initio Simulation of Strained Thermoelectric Materials ‎[3,382 bytes]
  157. (hist) ‎Accelerating Stencil Workloads on Snitch using ISSRs (1-2S/B) ‎[3,375 bytes]
  158. (hist) ‎Low-power chip-to-chip communication network ‎[3,375 bytes]
  159. (hist) ‎Extending the HERO RISC-V HPC stack to support multiple devices on heterogeneous SoCs (M/1-3S) ‎[3,370 bytes]
  160. (hist) ‎Multi issue OoO Ariane Backend (M) ‎[3,365 bytes]
  161. (hist) ‎A Wireless Sensor Network for a Smart LED Lighting control ‎[3,364 bytes]
  162. (hist) ‎Next Generation Channel Decoder ‎[3,360 bytes]
  163. (hist) ‎Building an RTL top level for a Mempool-based Heterogeneous SoC (M/1-3S) ‎[3,351 bytes]
  164. (hist) ‎LTE IoT Network Synchronization ‎[3,346 bytes]
  165. (hist) ‎Linux Driver for fine-grain and low overhead access to on-chip performance counters ‎[3,337 bytes]
  166. (hist) ‎Simulation of Negative Capacitance Ferroelectric Transistor ‎[3,335 bytes]
  167. (hist) ‎Ultra-High-Efficiency Power Supply Management for Ultra-Low-Power Systems on Chip ‎[3,329 bytes]
  168. (hist) ‎VLSI Implementation of a 5G Ciphering Accelerator ‎[3,312 bytes]
  169. (hist) ‎Neural Recording Interface and Signal Processing ‎[3,302 bytes]
  170. (hist) ‎CLIC for the CVA6 ‎[3,299 bytes]
  171. (hist) ‎Benchmarking RISC-V-based Accelerator Cards for Inference (multiple SA) ‎[3,265 bytes]
  172. (hist) ‎Heterogeneous SoCs ‎[3,257 bytes]
  173. (hist) ‎FPGA Optimizations of Dense Binary Hyperdimensional Computing ‎[3,251 bytes]
  174. (hist) ‎Gomeza old project1 ‎[3,251 bytes]
  175. (hist) ‎Design of combined Ultrasound and Electromyography systems ‎[3,250 bytes]
  176. (hist) ‎High Performance Digitally-Assisted Time Domain ADC Design for DPLL used in Cellular IOT ‎[3,248 bytes]
  177. (hist) ‎Ultrasound-EMG combined hand gesture recognition ‎[3,244 bytes]
  178. (hist) ‎NORX - an AEAD algorithm for the CAESAR competition ‎[3,243 bytes]
  179. (hist) ‎Using Motion Sensors to Support Indoor Localization ‎[3,236 bytes]
  180. (hist) ‎Augmenting Our IPs with AXI Stream Extensions (M/1-2S) ‎[3,235 bytes]
  181. (hist) ‎IoT Turbo Decoder ‎[3,235 bytes]
  182. (hist) ‎FPGA Testbed Implementation for Bluetooth Indoor Positioning ‎[3,221 bytes]
  183. (hist) ‎Advanced EEG glasses ‎[3,216 bytes]
  184. (hist) ‎NextGenChannelDec ‎[3,196 bytes]
  185. (hist) ‎Thermal Control of Mobile Devices ‎[3,195 bytes]
  186. (hist) ‎PULP Freertos with LLVM ‎[3,185 bytes]
  187. (hist) ‎Bateryless Heart Rate Monitoring ‎[3,181 bytes]
  188. (hist) ‎Deep Learning for Brain-Computer Interface ‎[3,180 bytes]
  189. (hist) ‎Engineering For Kids ‎[3,177 bytes]
  190. (hist) ‎LightProbe - Frontend Firmware and Control Side Channel ‎[3,177 bytes]
  191. (hist) ‎Satellite Internet of Things ‎[3,173 bytes]
  192. (hist) ‎Implementation of a 2-D model for Li-ion batteries ‎[3,173 bytes]
  193. (hist) ‎Efficient TNN compression ‎[3,170 bytes]
  194. (hist) ‎Shared Correlation Accelerator for an RF SoC ‎[3,167 bytes]
  195. (hist) ‎Digital Beamforming for Ultrasound Imaging ‎[3,167 bytes]
  196. (hist) ‎EEG earbud ‎[3,161 bytes]
  197. (hist) ‎Channel Estimation for 5G Cellular IoT and Fast Fading Channels ‎[3,153 bytes]
  198. (hist) ‎Putting Together What Fits Together - GrÆStl ‎[3,145 bytes]
  199. (hist) ‎Ultrasound measurement of microbubble stiffness for in situ detection of protease activity in clinical settings ‎[3,144 bytes]
  200. (hist) ‎Autonomous Smart Watches: Hardware and Software Desing ‎[3,139 bytes]
  201. (hist) ‎Finite Element Simulations of Transistors for Quantum Computing ‎[3,138 bytes]
  202. (hist) ‎Enabling Efficient Systolic Execution on MemPool (M) ‎[3,130 bytes]
  203. (hist) ‎Real-Time Pedestrian Detection For Privacy Enhancement ‎[3,130 bytes]
  204. (hist) ‎Linux Driver for built-in ADC using DMA and Programmable Real-Time Unit (PRU) support on Beaglebone Black used as embedded HPC-performance-monitoring device ‎[3,114 bytes]
  205. (hist) ‎Every individual on the planet should have a real chance to obtain personalized medical therapy ‎[3,103 bytes]
  206. (hist) ‎FPGA System Design for Computer Vision with Convolutional Neural Networks ‎[3,100 bytes]
  207. (hist) ‎Predict eye movement through brain activity ‎[3,095 bytes]
  208. (hist) ‎Vector Processor for In-Memory Computing ‎[3,095 bytes]
  209. (hist) ‎Development of an implantable Force sensor for orthopedic applications ‎[3,092 bytes]
  210. (hist) ‎High Power Efficient Digitally Controlled Oscillator Design for Cellular IOT ‎[3,091 bytes]
  211. (hist) ‎Hardware Accelerated Derivative Pricing ‎[3,088 bytes]
  212. (hist) ‎Integration Of A Smart Vision System ‎[3,086 bytes]
  213. (hist) ‎Event-Driven Vision on an embedded platform ‎[3,085 bytes]
  214. (hist) ‎Ultrafast Medical Ultrasound imaging on a GPU ‎[3,084 bytes]
  215. (hist) ‎Investigation of Metal Diffusion in Oxides for CBRAM Applications ‎[3,080 bytes]
  216. (hist) ‎Development Of An FPGA-Based Optoacoustic Image Reconstruction Platform for Clinical Applications ‎[3,078 bytes]
  217. (hist) ‎Efficient Search Design for Hyperdimensional Computing ‎[3,062 bytes]
  218. (hist) ‎Exploring feature selection and classification algorithms for ultra-low-power closed-loop systems for epilepsy control ‎[3,058 bytes]
  219. (hist) ‎Smart e-glasses for concealed recording of EEG signals ‎[3,040 bytes]
  220. (hist) ‎VLSI Implementation Polar Decoder using High Level Synthesis ‎[3,039 bytes]
  221. (hist) ‎A Flexible FPGA-Based Peripheral Platform Extending Linux-Capable Systems on Chip (1-3S/B) ‎[3,038 bytes]
  222. (hist) ‎Exploring features and algorithms for ultra-low-power closed-loop systems for epilepsy control ‎[3,027 bytes]
  223. (hist) ‎VLSI Implementation of a Low-Complexity Channel Shortener for 2G EC-GSM-IoT and Evolved EDGE ‎[3,001 bytes]
  224. (hist) ‎Variability Tolerant Ultra Low Power Cluster ‎[2,997 bytes]
  225. (hist) ‎EEG-based drowsiness detection ‎[2,995 bytes]
  226. (hist) ‎Advanced Data Movers for Modern Neural Networks ‎[2,983 bytes]
  227. (hist) ‎Andrea Cossettini ‎[2,977 bytes]
  228. (hist) ‎Towards Self Sustainable UAVs ‎[2,970 bytes]
  229. (hist) ‎Designing a Power Management Unit for PULP SoCs ‎[2,969 bytes]
  230. (hist) ‎ASIC Development of 5G-NR LDPC Decoder ‎[2,960 bytes]
  231. (hist) ‎Evaluating An Ultra low Power Vision Node ‎[2,958 bytes]
  232. (hist) ‎High-Throughput Authenticated Encryption Architectures based on Block Ciphers ‎[2,957 bytes]
  233. (hist) ‎Radiation Testing of a PULP ASIC ‎[2,955 bytes]
  234. (hist) ‎Accelerators for object detection and tracking ‎[2,947 bytes]
  235. (hist) ‎Circuits and Systems for Nanoelectrode Array Biosensors ‎[2,937 bytes]
  236. (hist) ‎FPGA acceleration of ultrasound computed tomography for in vivo tumor screening ‎[2,923 bytes]
  237. (hist) ‎Optimizing the Pipeline in our Floating Point Architectures (1S) ‎[2,922 bytes]
  238. (hist) ‎An FPGA-Based Evaluation Platform for Mobile Communications ‎[2,920 bytes]
  239. (hist) ‎Full-band simulations of InP/GaAsSb/InP Double Heterojunction Bipolar Transistors (DHBTs) ‎[2,916 bytes]
  240. (hist) ‎Compressed Sensing Reconstruction on FPGA ‎[2,916 bytes]
  241. (hist) ‎Evaluating The Use of Snitch In The PsPIN RISC-V In-network Accelerator (M) ‎[2,899 bytes]
  242. (hist) ‎Hypervisor Extension for Ariane (M) ‎[2,896 bytes]
  243. (hist) ‎Kinetic Energy Harvesting For Autonomous Smart Watches ‎[2,893 bytes]
  244. (hist) ‎Wearable Ultrasound for Artery monitoring ‎[2,884 bytes]
  245. (hist) ‎Time Synchronization for 3G Mobile Communications ‎[2,876 bytes]
  246. (hist) ‎High-Speed SAR ADC for next generation wireless communication in 12nm FinFET ‎[2,874 bytes]
  247. (hist) ‎StoneEDGE: An EC-GSM-IoT and Evolved EDGE PHY ASIC ‎[2,873 bytes]
  248. (hist) ‎Developing High Efficiency Batteries for Electric Cars ‎[2,871 bytes]
  249. (hist) ‎Testbed Design for Self-sustainable IoT Sensors ‎[2,870 bytes]
  250. (hist) ‎Ultrasound High Speed Microbubble Tracking ‎[2,861 bytes]

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