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Showing below up to 250 results in range #501 to #750.

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  1. (hist) ‎Evaluating The Use of Snitch In The PsPIN RISC-V In-network Accelerator (M) ‎[2,899 bytes]
  2. (hist) ‎Hypervisor Extension for Ariane (M) ‎[2,896 bytes]
  3. (hist) ‎Kinetic Energy Harvesting For Autonomous Smart Watches ‎[2,893 bytes]
  4. (hist) ‎Wearable Ultrasound for Artery monitoring ‎[2,884 bytes]
  5. (hist) ‎Time Synchronization for 3G Mobile Communications ‎[2,876 bytes]
  6. (hist) ‎High-Speed SAR ADC for next generation wireless communication in 12nm FinFET ‎[2,874 bytes]
  7. (hist) ‎StoneEDGE: An EC-GSM-IoT and Evolved EDGE PHY ASIC ‎[2,873 bytes]
  8. (hist) ‎Developing High Efficiency Batteries for Electric Cars ‎[2,871 bytes]
  9. (hist) ‎Testbed Design for Self-sustainable IoT Sensors ‎[2,870 bytes]
  10. (hist) ‎Ultrasound High Speed Microbubble Tracking ‎[2,861 bytes]
  11. (hist) ‎Minimum Variance Beamforming for Wearable Ultrasound Probes ‎[2,858 bytes]
  12. (hist) ‎Signal-Processing and Data-Compression on Beaglebone Black used as embedded HPC-performance-monitoring device ‎[2,851 bytes]
  13. (hist) ‎Evolved EDGE Physical Layer Incremental Redundancy Architecture ‎[2,848 bytes]
  14. (hist) ‎Investigation of the high-performance multi-threaded OoO IBM A2O Core (1-3S) ‎[2,846 bytes]
  15. (hist) ‎Computation of Phonon Bandstructure in III-V Nanostructures ‎[2,836 bytes]
  16. (hist) ‎Ternary Neural Networks for Face Recognition ‎[2,831 bytes]
  17. (hist) ‎Implementing Hibernation on the ARM Cortex M0 ‎[2,831 bytes]
  18. (hist) ‎An Energy Efficient Brain-Computer Interface using Mr.Wolf ‎[2,830 bytes]
  19. (hist) ‎Enhancing our DMA Engine with Vector Processing Capabilities (1-2S/B) ‎[2,829 bytes]
  20. (hist) ‎Next Generation Synchronization Signals ‎[2,827 bytes]
  21. (hist) ‎Ultra low power wearable ultrasound probe ‎[2,821 bytes]
  22. (hist) ‎Gomeza old project2 ‎[2,821 bytes]
  23. (hist) ‎Accelerator for Spatio-Temporal Video Filtering ‎[2,819 bytes]
  24. (hist) ‎Coherence-Capable Write-Back L1 Data Cache for Ariane (M) ‎[2,818 bytes]
  25. (hist) ‎Analog ‎[2,818 bytes]
  26. (hist) ‎Ultrasound Doppler system development ‎[2,813 bytes]
  27. (hist) ‎3D Turbo Decoder ASIC Realization ‎[2,810 bytes]
  28. (hist) ‎Design of a 25 Gbps SerDes for optical chip-to-chip communication ‎[2,809 bytes]
  29. (hist) ‎Gomeza old project3 ‎[2,806 bytes]
  30. (hist) ‎Design of Streaming Data Platform for High-Speed ADC Data ‎[2,801 bytes]
  31. (hist) ‎Bandwidth Extension with Carrier Aggregation for Mobile Gigabit-Communication ‎[2,801 bytes]
  32. (hist) ‎Jammer Mitigation Meets Machine Learning ‎[2,797 bytes]
  33. (hist) ‎Automatic unplugging detection for Ultrasound probes ‎[2,797 bytes]
  34. (hist) ‎Resource Partitioning of RPC DRAM ‎[2,796 bytes]
  35. (hist) ‎Benchmarking a RISC-V-based Server on LLMs/Foundation Models (SA or MA) ‎[2,793 bytes]
  36. (hist) ‎Wireless Communication Systems for the IoT ‎[2,790 bytes]
  37. (hist) ‎Design study of tunneling transistors based on a core/shell nanowire structures ‎[2,789 bytes]
  38. (hist) ‎Power Optimization in Multipliers ‎[2,785 bytes]
  39. (hist) ‎Smart Meters ‎[2,783 bytes]
  40. (hist) ‎Reading The GSM Beacon Carrier with OsmocomBB and stoneEDGE ‎[2,783 bytes]
  41. (hist) ‎CMOS power amplifier for field measurements in MRI systems ‎[2,781 bytes]
  42. (hist) ‎Spatio-Temporal Video Filtering ‎[2,778 bytes]
  43. (hist) ‎Design of MEMs Sensor Interface ‎[2,771 bytes]
  44. (hist) ‎Wireless EEG Acquisition and Processing ‎[2,769 bytes]
  45. (hist) ‎LightProbe - Design of a High-Speed Optical Link ‎[2,767 bytes]
  46. (hist) ‎Channel Estimation and Equalization for LTE Advanced ‎[2,762 bytes]
  47. (hist) ‎Accelerator for Boosted Binary Features ‎[2,755 bytes]
  48. (hist) ‎Design of Power-Noise-Efficient Discrete-Time Amplifier Using Open-Source Tools ‎[2,743 bytes]
  49. (hist) ‎Quantum Transport Modeling of Interband Cascade Lasers (ICL) ‎[2,742 bytes]
  50. (hist) ‎Improved Reacquisition for the 5G Cellular IoT ‎[2,733 bytes]
  51. (hist) ‎Advanced 5G Repetition Combining ‎[2,727 bytes]
  52. (hist) ‎High performance continous-time Delta-Sigma ADC for biomedical applications ‎[2,725 bytes]
  53. (hist) ‎Quantum transport in 2D heterostructures ‎[2,725 bytes]
  54. (hist) ‎Analog Compute-in-Memory Accelerator Interface and Integration ‎[2,712 bytes]
  55. (hist) ‎Improving datarate and efficiency of ultra low power wearable ultrasound ‎[2,711 bytes]
  56. (hist) ‎Improving SystemVerilog Support for Free And Open-Source EDA Tools (1-3S/B) ‎[2,710 bytes]
  57. (hist) ‎Simulation of Li-ion batteries and comparison with experimental data ‎[2,705 bytes]
  58. (hist) ‎On-chip clock synthesizer design and porting ‎[2,703 bytes]
  59. (hist) ‎Energy-efficient Circuits for Fully Wireless Brain-machine Interfaces ‎[2,702 bytes]
  60. (hist) ‎Image Sensor Interface and Pre-processing ‎[2,695 bytes]
  61. (hist) ‎Design of an LTE Module for the Internet of Things ‎[2,688 bytes]
  62. (hist) ‎Electrothermal characterization of van der Waals Heterostructures with a partial overlap ‎[2,686 bytes]
  63. (hist) ‎Digital Transmitter for Mobile Communications ‎[2,679 bytes]
  64. (hist) ‎Learning Image Compression with Convolutional Networks ‎[2,674 bytes]
  65. (hist) ‎Gomeza old project5 ‎[2,671 bytes]
  66. (hist) ‎Evaluating the RiscV Architecture ‎[2,671 bytes]
  67. (hist) ‎An Efficient Compiler Backend for Snitch (1S/B) ‎[2,667 bytes]
  68. (hist) ‎Application Specific Frequency Synthesizers (Analog/Digital PLLs) ‎[2,667 bytes]
  69. (hist) ‎Design and Implementation of an Approximate Floating Point Unit ‎[2,661 bytes]
  70. (hist) ‎MatPHY: An Open-Source Physical Layer Development Framework ‎[2,656 bytes]
  71. (hist) ‎Pulse Oximetry Fachpraktikum ‎[2,655 bytes]
  72. (hist) ‎Resource Partitioning of Caches ‎[2,652 bytes]
  73. (hist) ‎Design of combined Ultrasound and PPG systems ‎[2,650 bytes]
  74. (hist) ‎CPS Software-Configurable State-Machine ‎[2,649 bytes]
  75. (hist) ‎PVT Dynamic Adaptation in PULPv3 ‎[2,644 bytes]
  76. (hist) ‎Energy Efficient SoCs ‎[2,643 bytes]
  77. (hist) ‎Charging System for Implantable Electronics ‎[2,642 bytes]
  78. (hist) ‎A Wearable System for long term monitoring of human physiological parameters with E skin sensors ‎[2,634 bytes]
  79. (hist) ‎Ultrasound based hand gesture recognition ‎[2,626 bytes]
  80. (hist) ‎Inductive Charging Circuit for Implantable Devices ‎[2,622 bytes]
  81. (hist) ‎On-Board Software for PULP on a Satellite ‎[2,619 bytes]
  82. (hist) ‎Investigation of the source starvation effect in III-V MOSFET ‎[2,619 bytes]
  83. (hist) ‎High performance continuous-time Delta-Sigma ADC for magnetic resonance imaging ‎[2,617 bytes]
  84. (hist) ‎Network-on-Chip for coherent and non-coherent traffic (M) ‎[2,613 bytes]
  85. (hist) ‎DigitalUltrasoundHead ‎[2,613 bytes]
  86. (hist) ‎Assessment of novel photovoltaic architectures by circuit simulation ‎[2,613 bytes]
  87. (hist) ‎Optimal routing for 2D Mesh-based Analog Compute-In-Memory Accelerator Architecture (IBM-Zurich) ‎[2,609 bytes]
  88. (hist) ‎A RISC-V fault-tolerant many-core accelerator for 5G Non-Terrestrial Networks (1-2S/B) ‎[2,607 bytes]
  89. (hist) ‎Minimal Cost RISC-V core ‎[2,607 bytes]
  90. (hist) ‎Design of a VLIW processor architecture based on RISC-V ‎[2,607 bytes]
  91. (hist) ‎Battery indifferent wearable Ultrasound ‎[2,602 bytes]
  92. (hist) ‎Data Mapping for Unreliable Memories ‎[2,599 bytes]
  93. (hist) ‎Design of low-offset dynamic comparators ‎[2,598 bytes]
  94. (hist) ‎LightProbe - Thermal-Power aware on-head Beamforming ‎[2,593 bytes]
  95. (hist) ‎Ambient RF Energy harvesting for Wireless Sensor Network ‎[2,592 bytes]
  96. (hist) ‎Digital Transmitter for Cellular IoT ‎[2,591 bytes]
  97. (hist) ‎Design of Time-Encoded Spiking Neural Networks (IBM-Zurich) ‎[2,589 bytes]
  98. (hist) ‎High-Speed Digital-to-Analog Converter (DAC) for massive MIMO testing in 65nm CMOS ‎[2,570 bytes]
  99. (hist) ‎Neural Networks Framwork for Embedded Plattforms ‎[2,569 bytes]
  100. (hist) ‎Stand-Alone Edge Computing with GAP8 ‎[2,563 bytes]
  101. (hist) ‎4th Generation Synchronization ‎[2,556 bytes]
  102. (hist) ‎Nanoscale Hybrid III-V Plasmonic Laser for Low-Power Photonic ICs ‎[2,554 bytes]
  103. (hist) ‎Sandro Belfanti ‎[2,554 bytes]
  104. (hist) ‎Ultra Low-Power Oscillator ‎[2,548 bytes]
  105. (hist) ‎Noise Figure Measurement for Cryogenic System ‎[2,544 bytes]
  106. (hist) ‎Influence of the Initial Filament Geometry on the Forming Step in CBRAM. ‎[2,542 bytes]
  107. (hist) ‎Influence of the Initial Filament Geometry on the Forming Step in CBRAM ‎[2,542 bytes]
  108. (hist) ‎Enhancing our DMA Engine with Fault Tolerance ‎[2,539 bytes]
  109. (hist) ‎A Unified-Multiplier Based Hardware Architecture for Elliptic Curve Cryptography ‎[2,538 bytes]
  110. (hist) ‎Glitches Reduce Listening Time of Your iPod ‎[2,538 bytes]
  111. (hist) ‎Switched-capacitor power amplifier for IoT mobile communications: design of signal processing path ‎[2,537 bytes]
  112. (hist) ‎Implementing A Low-Power Sensor Node Network ‎[2,535 bytes]
  113. (hist) ‎Successive Interference Cancellation for 3G Downlink ‎[2,529 bytes]
  114. (hist) ‎Exploitation of Inherent Error Resilience of Wireless Systems under Unreliable Silicon ‎[2,519 bytes]
  115. (hist) ‎Compressed Sensing for Wireless Biosignal Monitoring ‎[2,514 bytes]
  116. (hist) ‎Quantum Key Secured 100 Gbit/s Payload Encryption and its High-Speed Network Interfaces ‎[2,512 bytes]
  117. (hist) ‎Combining Multi Sensor Imaging and Machine Learning for Robust Far-Field Vision ‎[2,509 bytes]
  118. (hist) ‎Sensor Fusion for Rockfall Sensor Node ‎[2,502 bytes]
  119. (hist) ‎Build the Fastest 2G Modem Ever ‎[2,499 bytes]
  120. (hist) ‎Development of a Rockfall Sensor Node ‎[2,498 bytes]
  121. (hist) ‎Integrating an Open-Source Double-Precision Floating-Point DivSqrt Unit into CVFPU (1S) ‎[2,493 bytes]
  122. (hist) ‎Eye movements ‎[2,489 bytes]
  123. (hist) ‎SystemVerilog formatter for our LowRISC-based guidelines (2-3G) ‎[2,479 bytes]
  124. (hist) ‎Extending our FPU with Internal High-Precision Accumulation (M) ‎[2,475 bytes]
  125. (hist) ‎Hybrid Analog/Digital Leveling Loop for Very-Low-Distortion Oscillator ‎[2,469 bytes]
  126. (hist) ‎Brunn test ‎[2,468 bytes]
  127. (hist) ‎Active-Set QP Solver on FPGA ‎[2,468 bytes]
  128. (hist) ‎Analog Layout Engine ‎[2,468 bytes]
  129. (hist) ‎Ultra-low power sampling front-end for acquisition of physiological signals ‎[2,460 bytes]
  130. (hist) ‎FPGA-Based Digital Frontend for 3G Receivers ‎[2,452 bytes]
  131. (hist) ‎Image and Video Processing ‎[2,447 bytes]
  132. (hist) ‎DMA Streaming Co-processor ‎[2,439 bytes]
  133. (hist) ‎LightProbe - 200G Remote DMA for GPU FPGA Data Transfers ‎[2,437 bytes]
  134. (hist) ‎Watchdog Timer for PULP ‎[2,421 bytes]
  135. (hist) ‎Ferroelectric Memristors for Artificial Neural Networks (IBM-Zurich) ‎[2,418 bytes]
  136. (hist) ‎Scaleout Study on Interleaved Memory Transfers in Huge Manycore Systems with Multiple HBM Channels (M/1-3S) ‎[2,414 bytes]
  137. (hist) ‎Toward hyperdimensional active perception: learning compressed sensorimotor control by demonstration ‎[2,413 bytes]
  138. (hist) ‎Molecular Binding Kinetics Modelling of NO2 on Graphene/hBN Heterostructure ‎[2,411 bytes]
  139. (hist) ‎High-Resolution, Calibrated Folding ADCs ‎[2,409 bytes]
  140. (hist) ‎Towards a Technology-independent and Synthesizable AXI4 Performance Monitoring and Throttling Unit (1-2S) ‎[2,404 bytes]
  141. (hist) ‎High-Throughput Hardware Implementations of Authenticated Encryption Algorithms ‎[2,403 bytes]
  142. (hist) ‎EEG artifact detection for epilepsy monitoring ‎[2,399 bytes]
  143. (hist) ‎RedCap-5G for IOT application on prototype taped-out silicon ‎[2,384 bytes]
  144. (hist) ‎Design of a Fused Multiply Add Floating Point Unit ‎[2,379 bytes]
  145. (hist) ‎Compressed Sensing vs JPEG ‎[2,376 bytes]
  146. (hist) ‎Successive Approximation Register (SAR) ADC ‎[2,376 bytes]
  147. (hist) ‎Design of State Retentive Flip-Flops ‎[2,374 bytes]
  148. (hist) ‎Ultrasound image data recycler ‎[2,373 bytes]
  149. (hist) ‎Digital Control of a DC/DC Buck Converter ‎[2,369 bytes]
  150. (hist) ‎Time Gain Compensation for Ultrasound Imaging ‎[2,365 bytes]
  151. (hist) ‎Machine Learning for extracting Muscle features from Ultrasound raw data ‎[2,364 bytes]
  152. (hist) ‎Biomedical Systems on Chip ‎[2,360 bytes]
  153. (hist) ‎Ultra-low power transceiver for implantable devices ‎[2,353 bytes]
  154. (hist) ‎Design and Implementation of ultra low power vision system ‎[2,342 bytes]
  155. (hist) ‎Investigating the Cost of Special-Case Handling in Low-Precision Floating-Point Dot Product Units (1S) ‎[2,341 bytes]
  156. (hist) ‎Creating an At-memory Low-overhead Bufferless Matrix Transposition Accelerator (1-3S/B) ‎[2,332 bytes]
  157. (hist) ‎WCDMA/HSPA+ Synchronization System Design, Implementation, and Testing ‎[2,319 bytes]
  158. (hist) ‎TCNs vs. LSTMs for Embedded Platforms ‎[2,318 bytes]
  159. (hist) ‎Implementation of Computationally Efficient Scattering Mechanisms for Periodic Devices and 2D Materials ‎[2,318 bytes]
  160. (hist) ‎Visualizing Functional Microbubbles using Ultrasound Imaging ‎[2,317 bytes]
  161. (hist) ‎Turbo Decoder Design for High Code Rates ‎[2,309 bytes]
  162. (hist) ‎Simulation of 2D artificial cilia metasurface in COMSOL ‎[2,307 bytes]
  163. (hist) ‎Running Rust on PULP ‎[2,302 bytes]
  164. (hist) ‎LightProbe - WIFI extension (PCB) ‎[2,299 bytes]
  165. (hist) ‎Super Resolution Radar/Imaging at mm-Wave frequencies ‎[2,285 bytes]
  166. (hist) ‎Low-power Temperature-insensitive Timer ‎[2,284 bytes]
  167. (hist) ‎Baseband Processor Development for 4G IoT ‎[2,283 bytes]
  168. (hist) ‎Real-time eye movement analysis on a tablet computer ‎[2,281 bytes]
  169. (hist) ‎David J. Mack ‎[2,280 bytes]
  170. (hist) ‎RISC-V base ISA for ultra-low-area cores (2-3G) ‎[2,276 bytes]
  171. (hist) ‎Channel Decoding for TD-HSPA ‎[2,272 bytes]
  172. (hist) ‎Energy Neutral Multi Sensors Wearable Device ‎[2,264 bytes]
  173. (hist) ‎Triple-Core PULPissimo ‎[2,260 bytes]
  174. (hist) ‎PREM Runtime Scheduling Policies ‎[2,259 bytes]
  175. (hist) ‎Low Power Embedded Systems and Wireless Sensors Networks ‎[2,258 bytes]
  176. (hist) ‎Machine Learning for extracting Muscle features using Ultrasound 2 ‎[2,257 bytes]
  177. (hist) ‎Development of a syringe label reader for the neurocritical care unit ‎[2,242 bytes]
  178. (hist) ‎Energy-Efficient Edge-Pursuit comparator for ultra-low power ADC ‎[2,237 bytes]
  179. (hist) ‎Learning Image Decompression with Convolutional Networks ‎[2,236 bytes]
  180. (hist) ‎Flexible Front-End Circuit for Biomedical Data Acquisition ‎[2,232 bytes]
  181. (hist) ‎Reconfigurability of SHA-3 candidates ‎[2,230 bytes]
  182. (hist) ‎Android Software Design ‎[2,224 bytes]
  183. (hist) ‎Extending the RISCV backend of LLVM to support PULP Extensions ‎[2,219 bytes]
  184. (hist) ‎LAPACK/BLAS for FPGA ‎[2,219 bytes]
  185. (hist) ‎Taping a Safer Silicon Implementation of Snitch (M/2-3S) ‎[2,217 bytes]
  186. (hist) ‎LightProbe - Ultracompact Power Supply PCB ‎[2,201 bytes]
  187. (hist) ‎An Ultra-Compact High-Power CMOS Power Amplifier for Millimeter-Wave 5G Communications ‎[2,200 bytes]
  188. (hist) ‎An Ultra-Low-Power Neuromorphic Spiking Neuron Design ‎[2,197 bytes]
  189. (hist) ‎Self Aware Epilepsy Monitoring ‎[2,194 bytes]
  190. (hist) ‎Low Power Embedded Systems ‎[2,192 bytes]
  191. (hist) ‎Hardware Exploration of Shared-Exponent MiniFloats (M) ‎[2,189 bytes]
  192. (hist) ‎Extension and Evaluation of TinyDMA (1-2S/B/2-3G) ‎[2,186 bytes]
  193. (hist) ‎Development of an efficient algorithm for quantum transport codes ‎[2,177 bytes]
  194. (hist) ‎Towards a High-performance Open-source Verification Suite for AXI-based Systems (M/1-3S/B) ‎[2,176 bytes]
  195. (hist) ‎Machine Learning for extracting Muscle features using Ultrasound ‎[2,167 bytes]
  196. (hist) ‎High Throughput Turbo Decoder Design ‎[2,163 bytes]
  197. (hist) ‎EvalEDGE: A 2G Cellular Transceiver FMC ‎[2,158 bytes]
  198. (hist) ‎Design of a Prototype Chip with Interleaved Memory and Network-on-Chip ‎[2,152 bytes]
  199. (hist) ‎A mmWave Voltage-Controlled-Oscillator (VCO) for beyond 5G applications ‎[2,135 bytes]
  200. (hist) ‎DC-DC Buck converter in 65nm CMOS ‎[2,131 bytes]
  201. (hist) ‎A Novel Constrained-Viterbi Algorithm with Linear Equalization and Grouping Assistance ‎[2,129 bytes]
  202. (hist) ‎SHAre - An application Specific Instruction Set Processor for SHA-2/3 ‎[2,124 bytes]
  203. (hist) ‎Internet of Things SoC Characterization ‎[2,109 bytes]
  204. (hist) ‎Fault-Tolerant Floating-Point Units (M) ‎[2,097 bytes]
  205. (hist) ‎ASIC Design Projects ‎[2,094 bytes]
  206. (hist) ‎Finalizing and Releasing Our Open-source AXI4 IPs (1-3S/B/2-3G) ‎[2,089 bytes]
  207. (hist) ‎Sub Noise Floor Channel Estimation for the Cellular Internet of Things ‎[2,078 bytes]
  208. (hist) ‎Audio DAC Conversion Jitter Measurement System ‎[2,075 bytes]
  209. (hist) ‎Improving Resiliency of Hyperdimensional Computing ‎[2,073 bytes]
  210. (hist) ‎Design of a Digital Audio Module for Ultra-Low Power Cellular Applications ‎[2,072 bytes]
  211. (hist) ‎Machine Learning on Ultrasound Images ‎[2,071 bytes]
  212. (hist) ‎Predictable Execution ‎[2,068 bytes]
  213. (hist) ‎Compression of Ultrasound data on FPGA ‎[2,067 bytes]
  214. (hist) ‎Intelligent Power Management Unit (iPMU) ‎[2,067 bytes]
  215. (hist) ‎Analog building blocks for mmWave manipulation ‎[2,064 bytes]
  216. (hist) ‎Implementation of an AES Hardware Processing Engine (B/S) ‎[2,064 bytes]
  217. (hist) ‎Acceleration and Transprecision ‎[2,054 bytes]
  218. (hist) ‎Interference Cancellation for Evolved EDGE on the RazorEDGE baseband ASIC ‎[2,044 bytes]
  219. (hist) ‎Event-Driven Computing ‎[2,043 bytes]
  220. (hist) ‎Channel Estimation for TD-HSPA ‎[2,028 bytes]
  221. (hist) ‎Signal to Noise Ratio Estimation for 3G standards ‎[2,025 bytes]
  222. (hist) ‎High-Resolution Large-Bandwidth Delta-Sigma A/D Converters in Ultra-Scaled CMOS ‎[2,024 bytes]
  223. (hist) ‎Energy Efficient AXI Interface to Serial Link Physical Layer ‎[2,020 bytes]
  224. (hist) ‎Electrically verifying a CMOS Multi-Modal Electrochemical, Impedance, and Optical Cellular Sensing Array for Massively Paralleled Exoelectrogen Screening ‎[2,001 bytes]
  225. (hist) ‎Beat DigRF ‎[2,000 bytes]
  226. (hist) ‎ASIC Design of a Sigma Point Processor ‎[1,998 bytes]
  227. (hist) ‎Implementation of a Cache Reliability Mechanism (1S/M) ‎[1,996 bytes]
  228. (hist) ‎RazorEDGE: An Evolved EDGE DBB ASIC ‎[1,995 bytes]
  229. (hist) ‎3D Ultrasound Bubble Tracking ‎[1,982 bytes]
  230. (hist) ‎Wireless Biomedical Signal Acquisition Device ‎[1,982 bytes]
  231. (hist) ‎Jammer-Resilient Synchronization for Wireless Communications ‎[1,962 bytes]
  232. (hist) ‎Non-binary LDPC Decoder for Deep-Space Optical Communications ‎[1,958 bytes]
  233. (hist) ‎Towards Formal Verification of the iDMA Engine (1-3S/B) ‎[1,954 bytes]
  234. (hist) ‎Make Cellular Internet of Things Receivers Smart ‎[1,954 bytes]
  235. (hist) ‎High Performance Cellular Receivers in Very Advanced CMOS ‎[1,952 bytes]
  236. (hist) ‎GUI-developement for an action-cam-based eye tracking device ‎[1,949 bytes]
  237. (hist) ‎Soft-Output Viterbi Equalizer as part of Evolved EDGE baseband ASIC ‎[1,946 bytes]
  238. (hist) ‎Enabling Standalone Operation for a Mobile Health Platform ‎[1,934 bytes]
  239. (hist) ‎Praxisgerechte Berechnung von Switching Noise in VLSI-Schaltungen ‎[1,931 bytes]
  240. (hist) ‎Fitting Power Consumption of an IP-based HLS Approach to Real Hardware (1-3S) ‎[1,929 bytes]
  241. (hist) ‎Near-Optimal Reduced-Complexity Sequence Detectors for TD-HSPA ‎[1,914 bytes]
  242. (hist) ‎LightProbe ‎[1,907 bytes]
  243. (hist) ‎Multi-Band Receiver Design for LTE Mobile Communication ‎[1,907 bytes]
  244. (hist) ‎Implementation of a Coherent Application-Class Multicore System (1-2S) ‎[1,897 bytes]
  245. (hist) ‎Wiederverwendung (reuse) ganzer Funktionsblöcke beim VLSI-Entwurf ‎[1,896 bytes]
  246. (hist) ‎Reliability by Switching the Embedded ISA in Ibex (1-2S/B/1M) ‎[1,878 bytes]
  247. (hist) ‎Low-Dropout Regulators for Magnetic Resonance Imaging ‎[1,867 bytes]
  248. (hist) ‎Fast and Accurate Multiclass Inference for Brain–Computer Interfaces ‎[1,865 bytes]
  249. (hist) ‎Students' International Competitions: F1(AMZ), Swissloop, Educational Rockets ‎[1,863 bytes]
  250. (hist) ‎Ultrasound Low power WiFi with IMX7 ‎[1,861 bytes]

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