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Showing below up to 500 results in range #21 to #520.

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  1. Atretter‏‎ (11:20, 12 December 2014)
  2. Ultra-High-Efficiency Power Supply Management for Ultra-Low-Power Systems on Chip‏‎ (18:06, 3 February 2015)
  3. A Novel Constrained-Viterbi Algorithm with Linear Equalization and Grouping Assistance‏‎ (10:43, 9 February 2015)
  4. Turbo Decoder Design for High Code Rates‏‎ (10:45, 9 February 2015)
  5. High Throughput Turbo Decoder Design‏‎ (10:46, 9 February 2015)
  6. IcySoC‏‎ (12:48, 9 February 2015)
  7. Near-Optimal Reduced-Complexity Sequence Detectors for TD-HSPA‏‎ (13:49, 9 February 2015)
  8. Channel Decoding for TD-HSPA‏‎ (13:55, 9 February 2015)
  9. Exploitation of Inherent Error Resilience of Wireless Systems under Unreliable Silicon‏‎ (13:56, 9 February 2015)
  10. Data Mapping for Unreliable Memories‏‎ (13:56, 9 February 2015)
  11. Multiuser Equalization and Detection for 3GPP TD-SCDMA‏‎ (14:07, 9 February 2015)
  12. Android reliability governor‏‎ (17:24, 9 February 2015)
  13. Ultra Low Power Wake Up Radio for Wireless Sensor Network‏‎ (19:54, 9 February 2015)
  14. Infrared Wake Up Radio‏‎ (19:55, 9 February 2015)
  15. Ambient RF Energy harvesting for Wireless Sensor Network‏‎ (19:56, 9 February 2015)
  16. Thermal Control of Mobile Devices‏‎ (11:03, 10 February 2015)
  17. Successive Interference Cancellation for 3G Downlink‏‎ (18:59, 10 February 2015)
  18. Channel Estimation for TD-HSPA‏‎ (19:00, 10 February 2015)
  19. FPGA‏‎ (19:50, 10 February 2015)
  20. ASIC‏‎ (19:52, 10 February 2015)
  21. Design and Implementation of ultra low power vision system‏‎ (16:46, 11 February 2015)
  22. Audio‏‎ (17:28, 11 February 2015)
  23. Quantum Key Secured 100 Gbit/s Payload Encryption and its High-Speed Network Interfaces‏‎ (20:06, 17 February 2015)
  24. Hybrid Analog/Digital Leveling Loop for Very-Low-Distortion Oscillator‏‎ (20:06, 17 February 2015)
  25. Audio DAC Conversion Jitter Measurement System‏‎ (20:06, 17 February 2015)
  26. Efficient Digital Signal Processing in High-Channel-Count High-Frame-Rate 3D Ultrasound Imaging Systems‏‎ (20:10, 17 February 2015)
  27. Soft-Output Viterbi Equalizer as part of Evolved EDGE baseband ASIC‏‎ (10:04, 18 February 2015)
  28. Interference Cancellation for Evolved EDGE on the RazorEDGE baseband ASIC‏‎ (10:06, 18 February 2015)
  29. Norbert Felber‏‎ (13:56, 18 February 2015)
  30. Philipp Schönle‏‎ (10:52, 10 March 2015)
  31. Flexible Front-End Circuit for Biomedical Data Acquisition‏‎ (10:53, 10 March 2015)
  32. Wireless Biomedical Signal Acquisition Device‏‎ (10:54, 10 March 2015)
  33. Benjamin Sporrer‏‎ (13:01, 10 March 2015)
  34. High Performance Cellular Receivers in Very Advanced CMOS‏‎ (13:02, 10 March 2015)
  35. Telecommunications‏‎ (17:42, 24 March 2015)
  36. Design and Implementation of a Convolutional Neural Network Accelerator ASIC‏‎ (19:45, 24 March 2015)
  37. Putting Together What Fits Together - GrÆStl‏‎ (12:01, 26 March 2015)
  38. SHAre - An application Specific Instruction Set Processor for SHA-2/3‏‎ (12:09, 26 March 2015)
  39. High-Throughput Authenticated Encryption Architectures based on Block Ciphers‏‎ (12:25, 26 March 2015)
  40. A Unified-Multiplier Based Hardware Architecture for Elliptic Curve Cryptography‏‎ (12:26, 26 March 2015)
  41. A Trustworthy Three-Factor Authentication System‏‎ (14:01, 26 March 2015)
  42. A Multiview Synthesis Core in 65 nm CMOS‏‎ (15:49, 13 May 2015)
  43. Feature Extraction with Binarized Descriptors: ASIC Implementation and FPGA Environment‏‎ (15:57, 13 May 2015)
  44. Real-time View Synthesis using Image Domain Warping‏‎ (16:04, 13 May 2015)
  45. Evolved EDGE Physical Layer Incremental Redundancy Architecture‏‎ (14:12, 27 May 2015)
  46. MatPHY: An Open-Source Physical Layer Development Framework‏‎ (14:14, 27 May 2015)
  47. Autonomous Smart Watches: Hardware and Software Desing‏‎ (11:59, 28 July 2015)
  48. A Wearable System for long term monitoring of human physiological parameters with E skin sensors‏‎ (11:59, 28 July 2015)
  49. Eye movements‏‎ (14:43, 29 July 2015)
  50. RazorEDGE: An Evolved EDGE DBB ASIC‏‎ (17:15, 1 September 2015)
  51. Hardware/software co-programming on the Parallella platform‏‎ (14:26, 2 September 2015)
  52. Real-Time Stereo to Multiview Conversion‏‎ (09:09, 23 October 2015)
  53. Active-Set QP Solver on FPGA‏‎ (13:09, 2 November 2015)
  54. Vector Processor for In-Memory Computing‏‎ (13:10, 2 November 2015)
  55. An FPGA-Based Testbed for 3G Mobile Communications Receivers‏‎ (16:42, 9 December 2015)
  56. EvaLTE: A 2G/3G/4G Cellular Transceiver FMC‏‎ (17:07, 17 December 2015)
  57. EvalEDGE: A 2G Cellular Transceiver FMC‏‎ (17:10, 17 December 2015)
  58. Design of a Digital Audio Module for Ultra-Low Power Cellular Applications‏‎ (18:15, 17 December 2015)
  59. A Wireless Sensor Network for a Smart LED Lighting control‏‎ (12:02, 27 January 2016)
  60. Bateryless Heart Rate Monitoring‏‎ (15:21, 28 January 2016)
  61. Real-Time Optical Flow Using Neural Networks‏‎ (11:22, 5 February 2016)
  62. Scattering Networks for Scene Labeling‏‎ (11:29, 5 February 2016)
  63. Improving Scene Labeling with Hyperspectral Data‏‎ (11:29, 5 February 2016)
  64. FFT-based Convolutional Network Accelerator‏‎ (11:30, 5 February 2016)
  65. Real-Time Pedestrian Detection For Privacy Enhancement‏‎ (13:17, 5 February 2016)
  66. Autonomous Smart Watches: Toward an ultra low power microphone detector with events classification‏‎ (12:11, 16 February 2016)
  67. Low-power Clock Generation Solutions for 65nm Technology‏‎ (19:37, 3 March 2016)
  68. Final Report‏‎ (10:22, 10 March 2016)
  69. NextGenChannelDec‏‎ (15:31, 13 April 2016)
  70. ASIC Implementation of High-Throughput Next Generation Turbo Decoders‏‎ (11:12, 14 April 2016)
  71. Channel Estimation and Equalization for LTE Advanced‏‎ (11:13, 14 April 2016)
  72. Time Synchronization for 3G Mobile Communications‏‎ (11:22, 14 April 2016)
  73. Signal to Noise Ratio Estimation for 3G standards‏‎ (11:23, 14 April 2016)
  74. High-Throughput Hardware Implementations of Authenticated Encryption Algorithms‏‎ (13:13, 14 April 2016)
  75. GSM Voice Capacity Evolution - VAMOS‏‎ (17:45, 14 April 2016)
  76. 4th Generation Synchronization‏‎ (17:56, 14 April 2016)
  77. Baseband Processor Development for 4G IoT‏‎ (17:58, 14 April 2016)
  78. Beat DigRF‏‎ (17:58, 14 April 2016)
  79. Research‏‎ (19:38, 14 April 2016)
  80. Spatio-Temporal Video Filtering‏‎ (19:40, 14 April 2016)
  81. 3D Turbo Decoder ASIC Realization‏‎ (12:33, 15 April 2016)
  82. Implementing Hibernation on the ARM Cortex M0‏‎ (11:59, 20 June 2016)
  83. Digital Transmitter for Cellular IoT‏‎ (16:41, 17 July 2016)
  84. An FPGA-Based Evaluation Platform for Mobile Communications‏‎ (16:05, 21 July 2016)
  85. Non-binary LDPC Decoder for Deep-Space Optical Communications‏‎ (16:05, 21 July 2016)
  86. Software‏‎ (13:45, 8 August 2016)
  87. Towards Self Sustainable UAVs‏‎ (20:45, 9 August 2016)
  88. Ultra Low Power Conversion Circuit For Batteryless Applications‏‎ (17:46, 10 August 2016)
  89. Libria‏‎ (09:35, 26 August 2016)
  90. Change-based Evaluation of Convolutional Neural Networks‏‎ (18:04, 29 August 2016)
  91. Learning Image Decompression with Convolutional Networks‏‎ (18:16, 29 August 2016)
  92. FPGA System Design for Computer Vision with Convolutional Neural Networks‏‎ (18:17, 29 August 2016)
  93. High-speed Scene Labeling on FPGA‏‎ (18:18, 29 August 2016)
  94. David J. Mack‏‎ (17:41, 31 August 2016)
  95. Eye tracking‏‎ (17:43, 31 August 2016)
  96. Linux Driver for fine-grain and low overhead access to on-chip performance counters‏‎ (15:55, 9 September 2016)
  97. Open Power-On Chip Controller Study and Integration‏‎ (15:57, 9 September 2016)
  98. PVT Dynamic Adaptation in PULPv3‏‎ (15:31, 13 September 2016)
  99. Compressed Sensing vs JPEG‏‎ (10:24, 14 September 2016)
  100. On-chip clock synthesizer design and porting‏‎ (11:20, 14 September 2016)
  101. FPGA-based Implementation of a Novel Cell-Search Algorithm for Mobile Communications‏‎ (11:15, 23 September 2016)
  102. Physical Layer Implementation of HSPA+ 4G Mobile Transceiver‏‎ (11:16, 23 September 2016)
  103. Synchronization and Power Control Concepts for 3GPP TD-SCDMA‏‎ (11:17, 23 September 2016)
  104. Channel Estimation for 3GPP TD-SCDMA‏‎ (11:17, 23 September 2016)
  105. Design and Implementation of Digital Spiking Neurons for Ultra-Low-Power In-Cluster Coprocessors‏‎ (14:50, 30 November 2016)
  106. Ultra-Efficient Visual Classification on Movidius Myriad2‏‎ (14:57, 30 November 2016)
  107. Rethinking our Convolutional Network Accelerator Architecture‏‎ (18:52, 12 December 2016)
  108. Ultra Low-Power Oscillator‏‎ (18:58, 19 December 2016)
  109. OpenRISC SoC for Sensor Applications‏‎ (15:23, 23 December 2016)
  110. Bandwidth Extension with Carrier Aggregation for Mobile Gigabit-Communication‏‎ (16:13, 29 December 2016)
  111. LightProbe - Design of a High-Speed Optical Link‏‎ (10:55, 10 January 2017)
  112. LightProbe - Ultracompact Power Supply PCB‏‎ (10:56, 10 January 2017)
  113. DigitalUltrasoundHead‏‎ (11:52, 10 January 2017)
  114. Single-Bit-Synapse Spiking Neural System-on-Chip‏‎ (12:22, 13 January 2017)
  115. Tiny CNNs for Ultra-Efficient Object Detection on PULP‏‎ (13:19, 13 January 2017)
  116. Gomeza old project3‏‎ (18:04, 28 January 2017)
  117. Gomeza old project2‏‎ (18:04, 28 January 2017)
  118. Gomeza old project1‏‎ (18:04, 28 January 2017)
  119. Gomeza old project5‏‎ (18:25, 28 January 2017)
  120. Gomeza old project4‏‎ (19:08, 28 January 2017)
  121. Development of a syringe label reader for the neurocritical care unit‏‎ (13:00, 22 February 2017)
  122. Open Source Baseband Firmware for 2G Cellular Networks‏‎ (11:30, 24 February 2017)
  123. Power Saver Mode for Cellular Internet of Things Receivers‏‎ (17:59, 29 March 2017)
  124. Make Cellular Internet of Things Receivers Smart‏‎ (18:00, 29 March 2017)
  125. Build the Fastest 2G Modem Ever‏‎ (18:00, 29 March 2017)
  126. Digital Audio Processor for Cellular Applications‏‎ (18:01, 29 March 2017)
  127. High performance continous-time Delta-Sigma ADC for biomedical applications‏‎ (17:46, 2 May 2017)
  128. Deconvolution Accelerator for On-Chip Semi-Supervised Learning‏‎ (14:48, 30 May 2017)
  129. Towards Online Training of CNNs: Hebbian-Based Deep Learning‏‎ (19:50, 30 May 2017)
  130. Embedded Audio Source Localization Exploiting Coincidence Detection in Asynchronous Spike Streams‏‎ (19:52, 30 May 2017)
  131. LAPACK/BLAS for FPGA‏‎ (12:38, 1 June 2017)
  132. Efficient Implementation of an Active-Set QP Solver for FPGAs‏‎ (12:39, 1 June 2017)
  133. Accelerator for Spatio-Temporal Video Filtering‏‎ (12:40, 1 June 2017)
  134. Variable Bit Precision Logic for Deep Learning and Artificial Intelligence‏‎ (10:43, 26 June 2017)
  135. Kinetic Energy Harvesting For Autonomous Smart Watches‏‎ (11:06, 12 July 2017)
  136. Desing and Implementation Of Long Lasting Key Finder With Bleetooth Low Energy‏‎ (11:38, 21 July 2017)
  137. Radio Signal Direction Detection For Smart Glasses For Augmented Reality Applications‏‎ (11:38, 21 July 2017)
  138. Towards The Integration of E-skin into Prosthetic Devices‏‎ (11:39, 21 July 2017)
  139. Using Motion Sensors to Support Indoor Localization‏‎ (11:41, 21 July 2017)
  140. Design of State Retentive Flip-Flops‏‎ (09:34, 25 July 2017)
  141. Passive and Self Sustaining Receivers For On and Intra Body Communication For Wearable Sensors Networks‏‎ (16:58, 28 July 2017)
  142. Low Power Neural Network For Multi Sensors Wearable Devices‏‎ (17:02, 28 July 2017)
  143. Neural Processing‏‎ (15:41, 7 August 2017)
  144. Accelerator for Boosted Binary Features‏‎ (11:51, 19 August 2017)
  145. FPGA acceleration of ultrasound computed tomography for in vivo tumor screening‏‎ (14:07, 30 August 2017)
  146. Control an external ADC using Programmable Real-Time Unit (PRU) Subsystem on Beaglebone Black used as embedded HPC-performance-monitoring device‏‎ (16:15, 1 September 2017)
  147. Glitches Reduce Listening Time of Your iPod‏‎ (15:59, 14 September 2017)
  148. Internet of Things Network Synchronizer‏‎ (20:00, 26 September 2017)
  149. Digital Transmitter for Mobile Communications‏‎ (20:00, 26 September 2017)
  150. FPGA-Based Digital Frontend for 3G Receivers‏‎ (20:01, 26 September 2017)
  151. Baseband Meets CPU‏‎ (20:02, 26 September 2017)
  152. Hardware Accelerated Derivative Pricing‏‎ (09:42, 12 October 2017)
  153. Hardware Accelerator Integration into Embedded Linux‏‎ (09:46, 12 October 2017)
  154. Sandro Belfanti‏‎ (17:27, 1 November 2017)
  155. Harald Kröll‏‎ (17:27, 1 November 2017)
  156. Internet of Things SoC Characterization‏‎ (10:37, 6 November 2017)
  157. VLSI Implementation of a Low-Complexity Channel Shortener for 2G EC-GSM-IoT and Evolved EDGE‏‎ (10:39, 6 November 2017)
  158. WCDMA/HSPA+ Synchronization System Design, Implementation, and Testing‏‎ (10:39, 6 November 2017)
  159. System Analysis and VLSI Design of NB-IoT Baseband Processing‏‎ (10:39, 6 November 2017)
  160. Synchronisation and Cyclic Prefix Handling For LTE Testbed‏‎ (10:40, 6 November 2017)
  161. Reading The GSM Beacon Carrier with OsmocomBB and stoneEDGE‏‎ (10:40, 6 November 2017)
  162. Design and VLSI Implementation of a Constrained-Viterbi Algorithm Equalizer for 3GPP TD-HSPA‏‎ (10:43, 6 November 2017)
  163. Time and Frequency Synchronization in LTE Cat-0 Devices‏‎ (10:43, 6 November 2017)
  164. Sub Noise Floor Channel Estimation for the Cellular Internet of Things‏‎ (11:27, 6 November 2017)
  165. Low-power chip-to-chip communication network‏‎ (12:34, 7 November 2017)
  166. Frank K. Gürkaynak‏‎ (12:36, 7 November 2017)
  167. Michael Muehlberghuber‏‎ (12:39, 7 November 2017)
  168. PULPonFPGA: Lightweight Virtual Memory Support - Page Table Walker‏‎ (17:57, 7 November 2017)
  169. PULPonFPGA: Lightweight Virtual Memory Support - Multi-Level TLB‏‎ (17:57, 7 November 2017)
  170. PULPonFPGA: Lightweight Virtual Memory Support - Coherency Extensions‏‎ (17:57, 7 November 2017)
  171. Hyper Meccano: Acceleration of Hyperdimensional Computing‏‎ (13:58, 9 November 2017)
  172. Digital Beamforming for Ultrasound Imaging‏‎ (11:23, 10 November 2017)
  173. CPS Software-Configurable State-Machine‏‎ (11:24, 10 November 2017)
  174. State-Saving @ NXP‏‎ (11:34, 10 November 2017)
  175. Pascal Hager‏‎ (11:40, 10 November 2017)
  176. Low Power Embedded Systems‏‎ (17:28, 13 November 2017)
  177. StoneEDGE: An EC-GSM-IoT and Evolved EDGE PHY ASIC‏‎ (13:53, 14 November 2017)
  178. Smart Virtual Memory Sharing‏‎ (12:16, 17 November 2017)
  179. Real-Time Implementation of Quantum State Identification using an FPGA‏‎ (09:03, 21 December 2017)
  180. Design of low-offset dynamic comparators‏‎ (17:35, 21 December 2017)
  181. Receiver design for the DigRF 4G high speed serial link‏‎ (17:37, 21 December 2017)
  182. LTE-Advanced RF Front-end Design in 28nm CMOS Technology‏‎ (17:38, 21 December 2017)
  183. Successive Approximation Register (SAR) ADC‏‎ (17:43, 21 December 2017)
  184. Analog Layout Engine‏‎ (17:44, 21 December 2017)
  185. Mattia‏‎ (18:47, 21 December 2017)
  186. Low Power Geolocalization And Indoor Localization‏‎ (13:36, 11 January 2018)
  187. BigPULP: Multicluster Synchronization Extensions‏‎ (12:17, 22 January 2018)
  188. High Speed FPGA Trigger Logic for Particle Physics Experiments‏‎ (21:42, 30 January 2018)
  189. Autonomous Sensors For Underwater Monitoring In Smart Navy Systems‏‎ (17:21, 31 January 2018)
  190. Smart Wearable System For Vital Sign Monitoring Exploiting On Board and Cloud Machine Learning‏‎ (17:21, 31 January 2018)
  191. A Wearable System To Control Phone And Electronic Device Without Hands‏‎ (17:22, 31 January 2018)
  192. Low Power One bit Microphone for Acoustic Imaging Using A Parallel Processor‏‎ (11:40, 2 February 2018)
  193. Wake Up Radio For Energy Efficient Communication System and IC Design‏‎ (11:54, 2 February 2018)
  194. Zero Power Touch Sensor and Reciever For Body Communication‏‎ (11:58, 2 February 2018)
  195. Monocular Vision-based Object Following on Nano-size Robotic Blimp‏‎ (16:14, 20 February 2018)
  196. Covariant Feature Detector on Parallel Ultra Low Power Architecture‏‎ (16:16, 20 February 2018)
  197. Towards Self-Sustainable Unmanned Aerial Vehicles‏‎ (16:17, 20 February 2018)
  198. Study and Development of Intelligent Capability for Small-Size UAVs‏‎ (16:18, 20 February 2018)
  199. Towards Autonomous Navigation for Nano-Blimps‏‎ (16:20, 20 February 2018)
  200. Self-Learning Drones based on Neural Networks‏‎ (16:26, 20 February 2018)
  201. A Waypoint-based Navigation System for Nano-Size UAVs in GPS-denied Environments‏‎ (16:35, 20 February 2018)
  202. Design and Implementation of an Approximate Floating Point Unit‏‎ (10:58, 21 February 2018)
  203. Fabian Schuiki‏‎ (11:02, 21 February 2018)
  204. Biomedical Systems on Chip‏‎ (19:55, 22 February 2018)
  205. PULP-Shield for Autonomous UAV‏‎ (11:06, 23 February 2018)
  206. Signal-Processing and Data-Compression on Beaglebone Black used as embedded HPC-performance-monitoring device‏‎ (16:19, 27 February 2018)
  207. Linux Driver for built-in ADC using DMA and Programmable Real-Time Unit (PRU) support on Beaglebone Black used as embedded HPC-performance-monitoring device‏‎ (16:19, 27 February 2018)
  208. A Wireless Sensor Network for HPC monitoring‏‎ (16:22, 27 February 2018)
  209. Interference Cancellation for EC-GSM-IoT‏‎ (19:52, 21 March 2018)
  210. Hyperdimensional Computing‏‎ (10:46, 25 April 2018)
  211. Charging System for Implantable Electronics‏‎ (13:05, 27 April 2018)
  212. GUI-developement for an action-cam-based eye tracking device‏‎ (11:10, 3 May 2018)
  213. Switched Capacitor Based Bandgap-Reference‏‎ (11:13, 3 May 2018)
  214. Efficient NB-IoT Uplink Design‏‎ (16:58, 7 May 2018)
  215. LTE IoT Network Synchronization‏‎ (16:32, 18 May 2018)
  216. Sub-Noise Floor Channel Tracking‏‎ (16:33, 18 May 2018)
  217. Enabling Standalone Operation‏‎ (14:41, 23 May 2018)
  218. Optimal System Duty Cycling‏‎ (14:44, 23 May 2018)
  219. Standard Cell Compatible Memory Array Design‏‎ (15:54, 23 May 2018)
  220. Implementation of a NB-IoT Positioning System‏‎ (16:36, 23 May 2018)
  221. Embedded Artificial Intelligence:Systems And Applications‏‎ (13:52, 12 June 2018)
  222. Physics is looking for PULP‏‎ (16:50, 21 June 2018)
  223. Creating a HDMI Video Interface for PULP‏‎ (09:37, 10 July 2018)
  224. A Wireless Sensor Network for a Smart Building Monitor and Control‏‎ (21:42, 30 July 2018)
  225. Ultrafast Medical Ultrasound imaging on a GPU‏‎ (12:13, 1 August 2018)
  226. Birds Long Term Monitoring With Ultra Low Power Wireless Sensor Node‏‎ (10:14, 3 August 2018)
  227. Students' Interanational Competitions: F1(AMZ), Swissloop, Educational Rockets‏‎ (10:55, 3 August 2018)
  228. Students' International Competitions: F1(AMZ), Swissloop, Educational Rockets‏‎ (11:50, 3 August 2018)
  229. Fast and Accurate Multiclass Inference for Brain–Computer Interfaces‏‎ (17:53, 7 August 2018)
  230. FPGA Optimizations of Dense Binary Hyperdimensional Computing‏‎ (10:11, 8 August 2018)
  231. Sensor Fusion for Rockfall Sensor Node‏‎ (11:51, 21 August 2018)
  232. Development of a Rockfall Sensor Node‏‎ (11:55, 21 August 2018)
  233. BigPULP: Shared Virtual Memory Multicluster Extensions‏‎ (15:05, 23 August 2018)
  234. Cryptography‏‎ (21:04, 24 August 2018)
  235. IoT Turbo Decoder‏‎ (09:37, 14 September 2018)
  236. Shared Correlation Accelerator for an RF SoC‏‎ (09:38, 14 September 2018)
  237. Engineering For Kids‏‎ (16:11, 18 September 2018)
  238. Turbo Equalization for Cellular IoT‏‎ (11:43, 13 November 2018)
  239. PREM on PULP‏‎ (18:20, 20 November 2018)
  240. Taimir Aguacil‏‎ (16:24, 23 November 2018)
  241. Analog IC Design‏‎ (18:10, 4 December 2018)
  242. Brunn test‏‎ (12:02, 5 December 2018)
  243. Karim Badawi‏‎ (15:06, 5 December 2018)
  244. Low-Energy Cluster-Coupled Vector Coprocessor for Special-Purpose PULP Acceleration‏‎ (15:50, 7 December 2018)
  245. Trace Debugger for custom RISC-V Core‏‎ (11:27, 11 December 2018)
  246. Digital Audio Interface for Smart Intensive Computing Triggering‏‎ (17:27, 22 January 2019)
  247. Scalable Heterogeneous L1 Memory Interconnect for Smart Accelerator Coupling in Ultra-Low Power Multicores‏‎ (21:21, 29 January 2019)
  248. Moritz Schneider‏‎ (16:36, 30 January 2019)
  249. Pulse Oximetry Fachpraktikum‏‎ (15:59, 18 February 2019)
  250. Elliptic Curve Accelerator for zkSNARKs‏‎ (15:02, 4 March 2019)
  251. Beat Cadence‏‎ (11:01, 18 March 2019)
  252. Deep Learning for Brain-Computer Interface‏‎ (20:22, 1 April 2019)
  253. Switched-capacitor power amplifier for IoT mobile communications: design of signal processing path‏‎ (15:55, 6 May 2019)
  254. Ultra-low power sampling front-end for acquisition of physiological signals‏‎ (16:06, 6 May 2019)
  255. CMOS power amplifier for field measurements in MRI systems‏‎ (16:06, 6 May 2019)
  256. Analysis and Design of Power Efficient RF/ mm-Wave LC-tank Oscillator in 28nm for 5G communication applications‏‎ (16:07, 6 May 2019)
  257. Design and implementation of the front-end for a portable ionizing radiation detector‏‎ (12:23, 9 May 2019)
  258. Experimental Validation of Impact Ionization Models for TCAD Simulation by a Novel Characterization Technique‏‎ (10:30, 5 June 2019)
  259. Design and Exploitation of a Test-Bench for Non-Destructive Characterization of the Susceptibility of Silicon Carbide (SiC) Power Devices to Cosmic Radiation‏‎ (16:31, 5 June 2019)
  260. Freedom from Interference in Heterogeneous COTS SoCs‏‎ (17:40, 19 June 2019)
  261. Predictable Execution on GPU Caches‏‎ (17:41, 19 June 2019)
  262. PREM Intervals and Loop Tiling‏‎ (18:00, 19 June 2019)
  263. Compiler Profiling and Optimizing‏‎ (18:20, 19 June 2019)
  264. Extending the RISCV backend of LLVM to support PULP Extensions‏‎ (18:27, 19 June 2019)
  265. NAND Flash Open Research Platform‏‎ (11:06, 11 July 2019)
  266. Minimal Cost RISC-V core‏‎ (17:24, 21 August 2019)
  267. A Demonstrator of Non-Synchronized Hyperdimensional Body Area Networks‏‎ (16:42, 27 August 2019)
  268. Influence of the Initial FilamentGeometry on the Forming Step in CBRAM‏‎ (18:39, 3 September 2019)
  269. Influence of the Initial Filament Geometry on the Forming Step in CBRAM‏‎ (15:34, 4 September 2019)
  270. Simulation of Negative Capacitance Ferroelectric Transistor‏‎ (15:37, 4 September 2019)
  271. Computation of Phonon Bandstructure in III-V Nanostructures‏‎ (15:37, 4 September 2019)
  272. Design study of tunneling transistors based on a core/shell nanowire structures‏‎ (15:38, 4 September 2019)
  273. Investigation of the source starvation effect in III-V MOSFET‏‎ (15:40, 4 September 2019)
  274. Implementation of a 2-D model for Li-ion batteries‏‎ (15:41, 4 September 2019)
  275. Ab-initio Simulation of Strained Thermoelectric Materials‏‎ (15:43, 4 September 2019)
  276. Simulation of Li-ion batteries and comparison with experimental data‏‎ (15:43, 4 September 2019)
  277. Full-band simulations of InP/GaAsSb/InP Double Heterojunction Bipolar Transistors (DHBTs)‏‎ (15:44, 4 September 2019)
  278. Interfacing PULP with a Brain-Inspired Ultra-Low Power Spiking Cochlea‏‎ (18:36, 5 September 2019)
  279. Design of Scalable Event-driven Neural-Recording Digital Interface‏‎ (18:40, 5 September 2019)
  280. Near-Memory Training of Neural Networks‏‎ (09:17, 11 September 2019)
  281. Application Specific Frequency Synthesizers (Analog/Digital PLLs)‏‎ (14:52, 25 September 2019)
  282. EECIS‏‎ (15:18, 25 September 2019)
  283. Deep-Learning Based Phoneme Recognition from a Ultra-Low Power Spiking Cochlea‏‎ (16:33, 3 October 2019)
  284. AnalogInt‏‎ (20:25, 25 October 2019)
  285. Cell Measurements for the 5G Internet of Things‏‎ (11:55, 29 October 2019)
  286. Herschmi‏‎ (15:03, 29 October 2019)
  287. Improving Resiliency of Hyperdimensional Computing‏‎ (15:51, 29 October 2019)
  288. Toward Superposition of Brain-Computer Interface Models‏‎ (15:52, 29 October 2019)
  289. Positioning for the cellular Internet of Things‏‎ (13:14, 31 October 2019)
  290. Interference Cancellation for the cellular Internet of Things‏‎ (13:15, 31 October 2019)
  291. Indoor Positioning with Bluetooth‏‎ (12:12, 4 November 2019)
  292. Design of an LTE Module for the Internet of Things‏‎ (14:20, 4 November 2019)
  293. Design of a VLIW processor architecture based on RISC-V‏‎ (10:25, 5 November 2019)
  294. Design of a Fused Multiply Add Floating Point Unit‏‎ (10:26, 5 November 2019)
  295. Audio Video Preprocessing In Parallel Ultra Low Power Platform‏‎ (10:27, 5 November 2019)
  296. PULPonFPGA: Hardware L2 Cache‏‎ (10:27, 5 November 2019)
  297. Image and Video Processing‏‎ (10:29, 5 November 2019)
  298. DMA Streaming Co-processor‏‎ (10:30, 5 November 2019)
  299. Developing a small portable neutron detector for detecting smuggled nuclear material‏‎ (10:32, 5 November 2019)
  300. Accelerators for object detection and tracking‏‎ (10:57, 5 November 2019)
  301. Design of an on-field adaptable pulse-processing unit for semicondutor radiation detectors‏‎ (18:26, 5 November 2019)
  302. Characterization of the susceptibility to cosmic radiation of wide bandgap power devices by radioactive sources and at cryogenic temperatures‏‎ (18:33, 5 November 2019)
  303. Ternary Weights Engine For Efficient Many Channels Spike Sorting Applications‏‎ (10:05, 18 November 2019)
  304. HERO: TLB Invalidation‏‎ (17:19, 18 November 2019)
  305. FPGA Testbed Implementation for Bluetooth Indoor Positioning‏‎ (21:47, 18 November 2019)
  306. PULPonFPGA: Lightweight Virtual Memory Support - Software Cache‏‎ (13:43, 29 November 2019)
  307. PULPonFPGA: Lightweight Virtual Memory Support - Physically Contiguous Memory‏‎ (13:43, 29 November 2019)
  308. Exploring Algorithms for Early Seizure Detection‏‎ (18:47, 6 January 2020)
  309. Toward hyperdimensional active perception: learning compressed sensorimotor control by demonstration‏‎ (20:12, 9 February 2020)
  310. Pirmin Vogel‏‎ (15:39, 3 March 2020)
  311. Real-Time ECG Contractions Classification‏‎ (19:15, 9 March 2020)
  312. Real-Time Embedded Classification of Neural Activity in Rat Barrel Cortex‏‎ (19:20, 9 March 2020)
  313. Final Presentation‏‎ (18:53, 22 March 2020)
  314. A computational memory unit using phase-change memory devices‏‎ (11:33, 17 April 2020)
  315. Accurate deep learning inference using computational memory‏‎ (12:51, 17 April 2020)
  316. Palm size chip NMR‏‎ (19:29, 7 May 2020)
  317. Timing Channel Mitigations for RISC-V Cores‏‎ (18:16, 20 May 2020)
  318. Nanoelectrode array biosensors - programmable non-overlapping clocks generator project‏‎ (07:56, 26 May 2020)
  319. Circuits and Systems for Nanoelectrode Array Biosensors‏‎ (13:27, 26 May 2020)
  320. An Energy Efficient Brain-Computer Interface using Mr.Wolf‏‎ (11:09, 21 July 2020)
  321. TCNs vs. LSTMs for Embedded Platforms‏‎ (11:10, 21 July 2020)
  322. Subject specific embeddings for transfer learning in brain-computer interfaces‏‎ (11:12, 21 July 2020)
  323. Exploring features and algorithms for ultra-low-power closed-loop systems for epilepsy control‏‎ (11:22, 21 July 2020)
  324. A Snitch-based Compute Accelerator for HERO‏‎ (14:58, 29 July 2020)
  325. Tbenz‏‎ (16:48, 29 July 2020)
  326. Stefan Mach‏‎ (17:06, 29 July 2020)
  327. Floating-Point Divide & Square Root Unit for Transprecision‏‎ (17:09, 29 July 2020)
  328. IBM Research–Zurich‏‎ (17:40, 10 August 2020)
  329. Ibex: Bit-Manipulation Extension‏‎ (09:45, 28 August 2020)
  330. Ibex: FPGA Optimizations‏‎ (09:45, 28 August 2020)
  331. Deep Convolutional Autoencoder for iEEG Signals‏‎ (13:36, 9 September 2020)
  332. Positioning with Wireless Signals‏‎ (10:24, 28 September 2020)
  333. Heterogeneous SoCs‏‎ (18:41, 28 October 2020)
  334. Signal Acquisition and Clock Offset Compensation for High-Rate Pulse UWB PHYs‏‎ (12:09, 29 October 2020)
  335. Ara: Update PULP's Vector Processor with the recent RISC-V Vector Extension Development‏‎ (14:42, 29 October 2020)
  336. Channel Estimation for 5G Cellular IoT and Fast Fading Channels‏‎ (18:54, 29 October 2020)
  337. Power Optimization in Multipliers‏‎ (16:23, 30 October 2020)
  338. Evaluating the RiscV Architecture‏‎ (16:24, 30 October 2020)
  339. Energy Neutral Multi Sensors Wearable Device‏‎ (16:24, 30 October 2020)
  340. Bringing XNOR-nets (ConvNets) to Silicon‏‎ (16:25, 30 October 2020)
  341. Learning Image Compression with Convolutional Networks‏‎ (16:25, 30 October 2020)
  342. Improving our Smart Camera System‏‎ (16:26, 30 October 2020)
  343. AMZ Driverless Competition Embedded Systems Projects‏‎ (16:27, 30 October 2020)
  344. Nils Wistoff‏‎ (18:59, 30 October 2020)
  345. LightProbe‏‎ (14:14, 31 October 2020)
  346. IBM A2O Core‏‎ (11:15, 2 November 2020)
  347. PREM Runtime Scheduling Policies‏‎ (11:47, 2 November 2020)
  348. (M): A Flexible Peripheral System for High-Performance Systems on Chip‏‎ (12:16, 2 November 2020)
  349. Implementation of a Heterogeneous System for Image Processing on an FPGA‏‎ (12:48, 2 November 2020)
  350. SSR combined with FREP in LLVM/Clang‏‎ (13:02, 2 November 2020)
  351. DaCe on Snitch‏‎ (13:03, 2 November 2020)
  352. Implementation of a Heterogeneous System for Image Processing on an FPGA (S)‏‎ (17:26, 2 November 2020)
  353. MemPool on HERO‏‎ (18:42, 2 November 2020)
  354. ISA extensions in the Snitch Processor for Signal Processing (1M)‏‎ (19:24, 2 November 2020)
  355. Event-Driven Computing‏‎ (11:16, 5 November 2020)
  356. All-Digital In-Memory Processing‏‎ (12:23, 5 November 2020)
  357. A Recurrent Neural Network Speech Recognition Chip‏‎ (13:38, 10 November 2020)
  358. Energy-Efficient Brain-Inspired Hyperdimensional Computing‏‎ (13:38, 10 November 2020)
  359. Hardware Accelerators for Lossless Quantized Deep Neural Networks‏‎ (13:41, 10 November 2020)
  360. NVDLA meets PULP‏‎ (13:42, 10 November 2020)
  361. An Industrial-grade Bluetooth LE Mesh Network Solution‏‎ (15:34, 10 November 2020)
  362. Contextual Intelligence on Resource-constraint Bluetooth LE IoT Devices‏‎ (15:36, 10 November 2020)
  363. Embedded Gesture Recognition Using Novel Mini Radar Sensors‏‎ (15:36, 10 November 2020)
  364. A Wearable Wireless Kidney Function Monitoring System For BioMedical Applications‏‎ (15:37, 10 November 2020)
  365. Indoor Smart Tracking of Hospital instrumentation‏‎ (15:37, 10 November 2020)
  366. Wireless Sensing With Long Range Comminication (LoRa)‏‎ (15:37, 10 November 2020)
  367. Optogenetics And Game Theory Applied To Small Side Bird Using Smart Sensing‏‎ (15:38, 10 November 2020)
  368. Edge Computing for Long-Term Wearable Biomedical Systems‏‎ (15:38, 10 November 2020)
  369. Efficient Search Design for Hyperdimensional Computing‏‎ (15:39, 10 November 2020)
  370. Improving Cold-Start in Batteryless And Energy Harvesting Systems‏‎ (15:41, 10 November 2020)
  371. Energy Efficient Smart Devices For Construction Building Maintenance Hilti Collaboration‏‎ (15:41, 10 November 2020)
  372. Wearable Smart Camera With Deep Learning Algorithms For Automatic Detecion‏‎ (15:41, 10 November 2020)
  373. Adversarial Attacks Against Deep Neural Networks In Wearable Cameras‏‎ (15:41, 10 November 2020)
  374. Neuromorphic Intelligence In An Embedded System in Collaboration with AiCTX‏‎ (15:45, 10 November 2020)
  375. High-throughput Embedded System For Neurotechnology in collaboration with INI‏‎ (15:48, 10 November 2020)
  376. Design Of A Biomarker Assay Based On Responsive Magnetic Nanoparticles‏‎ (15:48, 10 November 2020)
  377. Pressure and acoustic Smart Sensors Network for Wind Turbines Monitoring‏‎ (15:48, 10 November 2020)
  378. Embedded Systems and autonomous UAVs‏‎ (16:59, 10 November 2020)
  379. Predictable Execution‏‎ (18:48, 10 November 2020)
  380. IP-Based SoC Generation and Configuration (1-3S)‏‎ (20:24, 10 November 2020)
  381. Design-Space Exploration of Low-Resolution Matrix-Vector Multipliers‏‎ (11:08, 12 November 2020)
  382. Low-Resolution 5G Beamforming Codebook Design‏‎ (11:37, 12 November 2020)
  383. Real-Time Optimization‏‎ (13:57, 12 November 2020)
  384. Deep Unfolding of Iterative Optimization Algorithms‏‎ (13:57, 12 November 2020)
  385. LightProbe - CNN-Based-Image-Reconstruction‏‎ (20:46, 12 November 2020)
  386. LightProbe - 192cha Multiplexer Stage (Rigid-Flex-PCB Project)‏‎ (20:47, 12 November 2020)
  387. Next-Gen Ultrasound Imaging Systems (Industry Student Projects & PhD Opportunity)‏‎ (20:48, 12 November 2020)
  388. Ultrasound High Speed Microbubble Tracking‏‎ (20:49, 12 November 2020)
  389. LightProbe - Thermal-Power aware on-head Beamforming‏‎ (20:50, 12 November 2020)
  390. LightProbe - Frontend Firmware and Control Side Channel‏‎ (20:51, 12 November 2020)
  391. 3D Ultrasound Bubble Tracking‏‎ (20:52, 12 November 2020)
  392. Satellite Internet of Things‏‎ (13:53, 13 November 2020)
  393. FPGA-based Testbed Implementation of an Extended-Coverage Point-to-Point Communication Link for the Internet of Things‏‎ (13:54, 13 November 2020)
  394. Next Generation Channel Decoder‏‎ (14:01, 13 November 2020)
  395. An all Standard-Cell Based Energy Efficient HW Accelerator for DSP and Deep Learning Applications‏‎ (15:31, 16 November 2020)
  396. FFT HDL Code Generator for Multi-Antenna mmWave Communication‏‎ (19:40, 16 November 2020)
  397. Autonomus Drones With Novel Sensors And Ultra Wide Band‏‎ (11:39, 30 November 2020)
  398. Smart Patch For Heath Care And Rehabilitation‏‎ (16:24, 30 November 2020)
  399. Matheus Cavalcante‏‎ (18:33, 8 December 2020)
  400. Improved Reacquisition for the 5G Cellular IoT‏‎ (14:04, 11 January 2021)
  401. ASIC Design of a Gaussian Message Passing Processor‏‎ (08:34, 20 January 2021)
  402. ASIC Design of a Sigma Point Processor‏‎ (08:34, 20 January 2021)
  403. Hardware Accelerator for Model Predictive Controller‏‎ (08:35, 20 January 2021)
  404. Fast Wakeup From Deep Sleep State‏‎ (08:35, 20 January 2021)
  405. Compressed Sensing for Wireless Biosignal Monitoring‏‎ (08:35, 20 January 2021)
  406. Convolution Neural Networks on our Ultra-Low Power Mult-Core Plattform PULP‏‎ (08:36, 20 January 2021)
  407. Autoencoder Accelerator for On-Chip Semi-Supervised Learning‏‎ (08:37, 20 January 2021)
  408. Extend the RI5CY core with priviledge extensions‏‎ (08:38, 20 January 2021)
  409. Implementation of the RISC-V Bit Manipulation (RVB) extensions for our RI5CY core‏‎ (08:42, 20 January 2021)
  410. MemPool on HERO (1S)‏‎ (19:07, 20 January 2021)
  411. Cerebellum: Design of a Programmable Smart-Peripheral for the Ariane Core‏‎ (19:05, 29 January 2021)
  412. Resilient Brain-Inspired Hyperdimensional Computing Architectures‏‎ (19:08, 29 January 2021)
  413. Level Crossing ADC For a Many Channels Neural Recording Interface‏‎ (19:10, 29 January 2021)
  414. RISC-V based Implementation of Secure Ranging According to IEEE 802.15.4z UWB‏‎ (19:10, 29 January 2021)
  415. Spiking Neural Network for Autonomous Navigation‏‎ (19:10, 29 January 2021)
  416. Event-Driven Convolutional Neural Network Modular Accelerator‏‎ (19:10, 29 January 2021)
  417. ASIC Design Projects‏‎ (19:13, 29 January 2021)
  418. Implementation of the RISC-V Bit Manipulation (RVB) extensions for our RISC-V core‏‎ (19:19, 29 January 2021)
  419. A Snitch-based Compute Accelerator for HERO (M/1-2S)‏‎ (23:59, 6 February 2021)
  420. Heroino: Design of the next CORE-V Microcontroller‏‎ (00:01, 7 February 2021)
  421. VLSI Implementation of a 5G Ciphering Accelerator‏‎ (10:05, 9 February 2021)
  422. OTDOA Positioning for LTE Cat-M‏‎ (15:50, 9 February 2021)
  423. ASIC Development of 5G-NR LDPC Decoder‏‎ (01:43, 10 February 2021)
  424. Wireless Communication Systems for the IoT‏‎ (01:45, 10 February 2021)
  425. Software-Defined Paging in the Snitch Cluster (2-3S)‏‎ (20:08, 15 February 2021)
  426. Event-Driven Vision on an embedded platform‏‎ (08:41, 17 February 2021)
  427. Efficient TNN compression‏‎ (08:41, 17 February 2021)
  428. Design and Evaluation of a Small Size Avalanche Beacon‏‎ (10:02, 22 February 2021)
  429. ISA extensions in the Snitch Processor for Signal Processing (M)‏‎ (00:08, 13 March 2021)
  430. A Flexible Peripheral System for High-Performance Systems on Chip (M)‏‎ (15:40, 15 March 2021)
  431. Stand-Alone Edge Computing with GAP8‏‎ (14:38, 14 April 2021)
  432. Neural Networks Framwork for Embedded Plattforms‏‎ (14:40, 14 April 2021)
  433. Ibex: Tightly-Coupled Accelerators and ISA Extensions‏‎ (12:52, 27 April 2021)
  434. Intelligent Power Management Unit (iPMU)‏‎ (11:40, 2 June 2021)
  435. PULP in space - Fault Tolerant PULP System for Critical Space Applications‏‎ (14:46, 2 June 2021)
  436. Andreas Kurth‏‎ (07:40, 11 June 2021)
  437. Ferroelectric Memristors for Artificial Neural Networks (IBM-Zurich)‏‎ (12:21, 23 June 2021)
  438. Integrated silicon photonic structures-Lumiphase‏‎ (13:53, 23 June 2021)
  439. Integrated silicon photonic structures‏‎ (13:58, 23 June 2021)
  440. Phase-change memory devices for emerging computing paradigms‏‎ (14:13, 23 June 2021)
  441. Finite Element Simulations of Transistors for Quantum Computing‏‎ (14:14, 23 June 2021)
  442. Manycore System on FPGA (M/S/G)‏‎ (10:41, 6 July 2021)
  443. Physical Implementation of MemPool, PULP's Manycore System (1M/1-2S)‏‎ (10:41, 6 July 2021)
  444. An RPC DRAM Implementation for Energy-Efficient ASICs (1-2S)‏‎ (15:18, 9 July 2021)
  445. A Snitch-Based SoC on iCE40 FPGAs (1-2S/B)‏‎ (15:18, 9 July 2021)
  446. Bringup and Evaluation of an Energy-efficient Heterogeneous Manycore Compute Platform (1-2S)‏‎ (15:19, 9 July 2021)
  447. Investigation of the high-performance multi-threaded OoO IBM A2O Core (1-3S)‏‎ (15:19, 9 July 2021)
  448. LLVM and DaCe for Snitch (1-2S)‏‎ (15:20, 9 July 2021)
  449. Ottocore: A Minimal RISC-V Core Designed for Teaching (B/2G)‏‎ (15:21, 9 July 2021)
  450. Towards the Ariane Desktop: Display Output for Ariane on FPGA under Linux (S/B/G)‏‎ (15:21, 9 July 2021)
  451. Physical Implementation of Ara, PULP's Vector Machine (1-2S)‏‎ (15:25, 9 July 2021)
  452. Unconventional phase change memory device concepts for in-memory and neuromorphic computin‏‎ (13:07, 23 July 2021)
  453. Test page‏‎ (12:30, 27 July 2021)
  454. Semi-Custom Digital VLSI for Processing-in-Memory‏‎ (14:33, 28 July 2021)
  455. SystemVerilog formatter for our LowRISC-based guidelines (2-3G)‏‎ (19:57, 29 July 2021)
  456. Fast Simulation of Manycore Systems (1S)‏‎ (17:20, 2 August 2021)
  457. Evaluating memory access pattern specializations in OoO, server-grade cores (M)‏‎ (13:25, 10 August 2021)
  458. DC-DC Buck converter in 65nm CMOS‏‎ (11:36, 20 August 2021)
  459. Low-Dropout Regulators for Magnetic Resonance Imaging‏‎ (11:38, 20 August 2021)
  460. High performance continuous-time Delta-Sigma ADC for magnetic resonance imaging‏‎ (11:40, 20 August 2021)
  461. Ultra-low power transceiver for implantable devices‏‎ (11:43, 20 August 2021)
  462. Inductive Charging Circuit for Implantable Devices‏‎ (11:43, 20 August 2021)
  463. Design of a 25 Gbps SerDes for optical chip-to-chip communication‏‎ (11:44, 20 August 2021)
  464. High Performance Digitally-Assisted Time Domain ADC Design for DPLL used in Cellular IOT‏‎ (11:45, 20 August 2021)
  465. High Power Efficient Digitally Controlled Oscillator Design for Cellular IOT‏‎ (11:45, 20 August 2021)
  466. Design of Charge-Pump PLL in 22nm for 5G communication applications‏‎ (15:51, 20 August 2021)
  467. Design of Time-Encoded Spiking Neural Networks (IBM-Zurich)‏‎ (10:54, 31 August 2021)
  468. Bluetooth Low Energy network with optimized data throughput‏‎ (17:18, 14 September 2021)
  469. A mmWave Voltage-Controlled-Oscillator (VCO) for beyond 5G applications‏‎ (15:31, 15 September 2021)
  470. 5G Cellular RF Front-end Design in 22nm CMOS Technology‏‎ (15:36, 15 September 2021)
  471. Analog building blocks for mmWave manipulation‏‎ (15:44, 15 September 2021)
  472. Low Latency Brain-Machine Interfaces‏‎ (09:18, 16 September 2021)
  473. Hyper-Dimensional Computing Based Predictive Maintenance‏‎ (09:18, 16 September 2021)
  474. Towards global Brain-Computer Interfaces‏‎ (09:20, 16 September 2021)
  475. Combining Spiking Neural Networks with Hyperdimensional Computing for Autonomous Navigation‏‎ (09:23, 16 September 2021)
  476. Exploring feature selection and classification algorithms for ultra-low-power closed-loop systems for epilepsy control‏‎ (09:25, 16 September 2021)
  477. Every individual on the planet should have a real chance to obtain personalized medical therapy‏‎ (17:04, 16 September 2021)
  478. Characterization techniques for silicon photonics-Lumiphase‏‎ (17:05, 16 September 2021)
  479. Implementation of Computationally Efficient Scattering Mechanisms for Periodic Devices and 2D Materials‏‎ (17:06, 16 September 2021)
  480. Electrothermal characterization of van der Waals Heterostructures with a partial overlap‏‎ (17:06, 16 September 2021)
  481. Finite element modeling of electrochemical random access memory‏‎ (17:06, 16 September 2021)
  482. Influence of the Initial Filament Geometry on the Forming Step in CBRAM.‏‎ (17:07, 16 September 2021)
  483. Nanoscale Hybrid III-V Plasmonic Laser for Low-Power Photonic ICs‏‎ (17:09, 16 September 2021)
  484. Design space exploration of InP Heterojunction Bipolar Transistors (DHBTs)‏‎ (17:09, 16 September 2021)
  485. Quantum transport in 2D heterostructures‏‎ (17:10, 16 September 2021)
  486. Development of an efficient algorithm for quantum transport codes‏‎ (17:10, 16 September 2021)
  487. Investigation of Metal Diffusion in Oxides for CBRAM Applications‏‎ (17:11, 16 September 2021)
  488. Investigation of Redox Processes in CBRAM‏‎ (17:12, 16 September 2021)
  489. Combining Multi Sensor Imaging and Machine Learning for Robust Far-Field Vision‏‎ (15:53, 11 October 2021)
  490. Implementing A Low-Power Sensor Node Network‏‎ (15:53, 11 October 2021)
  491. VLSI Design of an Asynchronous LDPC Decoder‏‎ (17:36, 20 October 2021)
  492. LightProbe - Implementation of compressed-sensing algorithms‏‎ (10:37, 26 October 2021)
  493. Training and Deploying Next-Generation Quantized Neural Networks on Microcontrollers‏‎ (11:32, 29 October 2021)
  494. RISC-V base ISA for ultra-low-area cores (2-3G)‏‎ (13:15, 15 November 2021)
  495. Multi issue OoO Ariane Backend (M)‏‎ (15:50, 17 November 2021)
  496. Transforming MemPool into a CGRA (M)‏‎ (15:51, 17 November 2021)
  497. Integrating Hardware Accelerators into Snitch‏‎ (16:15, 19 November 2021)
  498. SW/HW Predictability and Security‏‎ (21:03, 19 November 2021)
  499. XNORLAX: Fused XNOR-LATCH Custom-Standard-Cell-Based Processing-in-Memory‏‎ (19:29, 21 November 2021)
  500. Accelerating Applications Relying on Matrix-Vector-Product-Like Operations‏‎ (19:45, 21 November 2021)

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