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Showing below up to 500 results in range #201 to #700.
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- Cycle-Accurate Event-Based Simulation of Snitch Core (9 categories)
- Integrating Hardware Accelerators into Snitch (1S) (9 categories)
- On-Device Learnable Embeddings for Acoustic Environments (9 categories)
- HERO: TLB Invalidation (9 categories)
- Improving SystemVerilog Support for Free And Open-Source EDA Tools (1-3S/B) (9 categories)
- Knowledge Distillation for Embedded Machine Learning (9 categories)
- Wireless In Action Data Streaming in Ski Jumping (1 B/S) (9 categories)
- Outdoor Precision Object Tracking for Rockfall Experiments (9 categories)
- Finalizing and Releasing Our Open-source AXI4 IPs (1-3S/B/2-3G) (9 categories)
- Deep neural networks for seizure detection (9 categories)
- Smart Goggles for Visual In-Action Feedback in Ski Jumping (1 M 1-2B/S) (9 categories)
- EEG artifact detection for epilepsy monitoring (9 categories)
- Trace Debugger for custom RISC-V Core (9 categories)
- Autonomus Drones With Novel Sensors And Ultra Wide Band (9 categories)
- Design and VLSI Implementation of a Constrained-Viterbi Algorithm Equalizer for 3GPP TD-HSPA (9 categories)
- AXI-based Network on Chip (NoC) system (9 categories)
- Neural Network Algorithms and Interfaces with Accelerators for Embedded Platforms with Real World Applications (9 categories)
- EEG artifact detection with machine learning (9 categories)
- On - Device Continual Learning for Seizure Detection on GAP9 (9 categories)
- Counter-based Fast Power Estimation using FPGAs (M/1-3S) (9 categories)
- Spatz grows wings: Physical Implementation of a Vector-Powered Manycore System (2S) (9 categories)
- Multisensory system for performance analysis in ski jumping (M/1-2S/B) (9 categories)
- Writing a Hero runtime for EPAC (1-3S/B) (9 categories)
- Extending the HERO RISC-V HPC stack to support multiple devices on heterogeneous SoCs (M/1-3S) (9 categories)
- Investigation of Quantization Strategies for Retentive Networks (1S) (9 categories)
- BLISS - Battery-Less Identification System for Security (9 categories)
- Hardware/software codesign neural decoding algorithm for “neural dust” (9 categories)
- Developing a Transposition Unit to Accelerate ML Workloads (1-3S/B) (9 categories)
- An all Standard-Cell Based Energy Efficient HW Accelerator for DSP and Deep Learning Applications (9 categories)
- Approximate Matrix Multiplication based Hardware Accelerator to achieve the next 10x in Energy Efficiency: Training Strategy And Algorithmic optimizations (9 categories)
- Flexfloat DL Training Framework (9 categories)
- Active-Set QP Solver on FPGA (9 categories)
- Benchmarking a heterogeneous 217-core MPSoC on HPC applications (M/1-3S) (9 categories)
- High-Speed Digital-to-Analog Converter (DAC) for massive MIMO testing in 65nm CMOS (9 categories)
- Implementation of a Heterogeneous System for Image Processing on an FPGA (S) (9 categories)
- Adaptively Controlled Polarization And Hysteresis Curve Tracing For Polymer Piezoelectrics (1 S/B) (9 categories)
- Ultrasound signal processing acceleration with CUDA (9 categories)
- Investigation of the high-performance multi-threaded OoO IBM A2O Core (1-3S) (9 categories)
- System Analysis and VLSI Design of NB-IoT Baseband Processing (9 categories)
- Vector-based Parallel Programming Optimization of Communication Algorithm (1-2S/B) (9 categories)
- Spiking Neural Network for Motor Function Decoding Based on Neural Dust (9 categories)
- ASIC Development of 5G-NR LDPC Decoder (9 categories)
- ML based Quantitative Movement Analysis on a Portable IoT Camera (1-2S/B) (9 categories)
- NVDLA meets PULP (9 categories)
- Exploring NAS spaces with C-BRED (9 categories)
- High-Speed SAR ADC for next generation wireless communication in 12nm FinFET (9 categories)
- Adding Linux Support to our DMA Engine (1-2S/B) (9 categories)
- NeuroSoC RISC-V Component (M/1-2S) (9 categories)
- Extreme-Edge Experience Replay for Keyword Spotting (9 categories)
- Efficient Execution of Transformers in RISC-V Vector Machines with Custom HW acceleration (M) (9 categories)
- An Efficient Compiler Backend for Snitch (1S/B) (9 categories)
- Analog building blocks for mmWave manipulation (8 categories)
- Wearables in Fashion (8 categories)
- A reduction-capable AXI XBAR for fast M-to-1 communication (1M) (8 categories)
- Deep Convolutional Autoencoder for iEEG Signals (8 categories)
- Sub Noise Floor Channel Estimation for the Cellular Internet of Things (8 categories)
- Digital Control of a DC/DC Buck Converter (8 categories)
- Using Motion Sensors to Support Indoor Localization (8 categories)
- Neuromorphic Intelligence In An Embedded System in Collaboration with AiCTX (8 categories)
- Autonomous Sensing For Trains In The IoT Era (8 categories)
- TCNs vs. LSTMs for Embedded Platforms (8 categories)
- An Energy Efficient Brain-Computer Interface using Mr.Wolf (8 categories)
- Hardware Accelerators for Lossless Quantized Deep Neural Networks (8 categories)
- Ibex: FPGA Optimizations (8 categories)
- Standard Cell Compatible Memory Array Design (8 categories)
- Embedded Gesture Recognition Using Novel Mini Radar Sensors (8 categories)
- High-Throughput Hardware Implementations of Authenticated Encryption Algorithms (8 categories)
- RedCap-5G for IOT application on prototype taped-out silicon (8 categories)
- New RVV 1.0 Vector Instructions for Ara (8 categories)
- Autonomous Sensors For Underwater Monitoring In Smart Navy Systems (8 categories)
- Contextual Intelligence on Resource-constraint Bluetooth LE IoT Devices (8 categories)
- 3D Matrix Multiplication Unit for ITA (1S) (8 categories)
- A Waypoint-based Navigation System for Nano-Size UAVs in GPS-denied Environments (8 categories)
- Event-Driven Vision on an embedded platform (8 categories)
- Optimizing the Pipeline in our Floating Point Architectures (1S) (8 categories)
- Accelerating Matrix Multiplication on a 216-core MPSoC (1M) (8 categories)
- Digital Transmitter for Mobile Communications (8 categories)
- Efficient NB-IoT Uplink Design (8 categories)
- A Wearable System To Control Phone And Electronic Device Without Hands (8 categories)
- Optogenetics And Game Theory Applied To Small Side Bird Using Smart Sensing (8 categories)
- Hardware Exploration of Shared-Exponent MiniFloats (M) (8 categories)
- Creating an At-memory Low-overhead Bufferless Matrix Transposition Accelerator (1-3S/B) (8 categories)
- High-throughput Embedded System For Neurotechnology in collaboration with INI (8 categories)
- Resilient Brain-Inspired Hyperdimensional Computing Architectures (8 categories)
- Deep Learning for Brain-Computer Interface (8 categories)
- SmartRing (8 categories)
- Towards global Brain-Computer Interfaces (8 categories)
- VLSI Implementation of a 5G Ciphering Accelerator (8 categories)
- RVfplib (8 categories)
- Designing a Power Management Unit for PULP SoCs (8 categories)
- WCDMA/HSPA+ Synchronization System Design, Implementation, and Testing (8 categories)
- Accelerator for Boosted Binary Features (8 categories)
- Extended Verification for Ara (8 categories)
- Design of an Area-Optimized Soft-Error Resilient Processing Core for Safety-Critical Systems (1M) (8 categories)
- Adversarial Attacks Against Deep Neural Networks In Wearable Cameras (8 categories)
- Radiation Testing of a PULP ASIC (8 categories)
- A Wearable Wireless Kidney Function Monitoring System For BioMedical Applications (8 categories)
- Android reliability governor (8 categories)
- DC-DC Buck converter in 65nm CMOS (8 categories)
- LightProbe - 192cha Multiplexer Stage (Rigid-Flex-PCB Project) (8 categories)
- Extending Our DMA Architecture with SiFives TileLink Protocol (1-3S/B) (8 categories)
- FPGA-Based Digital Frontend for 3G Receivers (8 categories)
- Compiler Profiling and Optimizing (8 categories)
- Investigating the Cost of Special-Case Handling in Low-Precision Floating-Point Dot Product Units (1S) (8 categories)
- EvalEDGE: A 2G Cellular Transceiver FMC (8 categories)
- Scalable Heterogeneous L1 Memory Interconnect for Smart Accelerator Coupling in Ultra-Low Power Multicores (8 categories)
- Wireless Sensing With Long Range Comminication (LoRa) (8 categories)
- PREM Intervals and Loop Tiling (8 categories)
- Real-time View Synthesis using Image Domain Warping (8 categories)
- DMA Streaming Co-processor (8 categories)
- Integrating an Open-Source Double-Precision Floating-Point DivSqrt Unit into CVFPU (1S) (8 categories)
- Energy Efficient AXI Interface to Serial Link Physical Layer (8 categories)
- Extending our FPU with Internal High-Precision Accumulation (M) (8 categories)
- Low-Dropout Regulators for Magnetic Resonance Imaging (8 categories)
- RazorEDGE: An Evolved EDGE DBB ASIC (8 categories)
- Thermal Control of Mobile Devices (8 categories)
- Low Precision Ara for ML (8 categories)
- Efficient TNN compression (8 categories)
- A Wireless Sensor Network for a Smart Building Monitor and Control (8 categories)
- Ultra-wideband Concurrent Ranging (8 categories)
- Fitting Power Consumption of an IP-based HLS Approach to Real Hardware (1-3S) (8 categories)
- Precise Ultra-low-power Timer (8 categories)
- Real-time eye movement analysis on a tablet computer (8 categories)
- Implementation of a Cache Reliability Mechanism (1S/M) (8 categories)
- Short Range Radars For Biomedical Application (8 categories)
- Integration Of A Smart Vision System (8 categories)
- LightProbe - CNN-Based-Image-Reconstruction (8 categories)
- Mapping Networks on Reconfigurable Binary Engine Accelerator (8 categories)
- Ultrasound image data recycler (8 categories)
- Autoencoder Accelerator for On-Chip Semi-Supervised Learning (8 categories)
- Design Of A Biomarker Assay Based On Responsive Magnetic Nanoparticles (8 categories)
- Smart Patch For Heath Care And Rehabilitation (8 categories)
- Synchronisation and Cyclic Prefix Handling For LTE Testbed (8 categories)
- Transformer Deployment on Heterogeneous Many-Core Systems (8 categories)
- Physical Implementation of ITA (2S) (8 categories)
- Reading The GSM Beacon Carrier with OsmocomBB and stoneEDGE (8 categories)
- Efficient collective communications in FlooNoC (1M) (8 categories)
- Benchmarking a RISC-V-based Server on LLMs/Foundation Models (SA or MA) (8 categories)
- Extending the RISCV backend of LLVM to support PULP Extensions (8 categories)
- Bluetooth Low Energy receiver in 65nm CMOS (8 categories)
- Edge Computing for Long-Term Wearable Biomedical Systems (8 categories)
- Evaluating The Use of Snitch In The PsPIN RISC-V In-network Accelerator (M) (8 categories)
- All the flavours of FFT on MemPool (1-2S/B) (8 categories)
- Vector-based Manycore HPC Cluster Exploration for 5G Communication Algorithm (1-2M) (8 categories)
- Feature Extraction and Architecture Clustering for Keyword Spotting (1S) (8 categories)
- Indoor Positioning with Bluetooth (8 categories)
- Spiking Neural Network for Autonomous Navigation (8 categories)
- Analog Compute-in-Memory Accelerator Interface and Integration (8 categories)
- Wearable Smart Camera With Deep Learning Algorithms For Automatic Detecion (8 categories)
- Predictable Execution on GPU Caches (8 categories)
- LightProbe - Frontend Firmware and Control Side Channel (8 categories)
- Energy Efficient Smart Devices For Construction Building Maintenance Hilti Collaboration (8 categories)
- FPGA System Design for Computer Vision with Convolutional Neural Networks (8 categories)
- PVT Dynamic Adaptation in PULPv3 (8 categories)
- Smart Wearable System For Vital Sign Monitoring Exploiting On Board and Cloud Machine Learning (8 categories)
- Triple-Core PULPissimo (8 categories)
- Novel Metastability Mitigation Technique (8 categories)
- Open Power-On Chip Controller Study and Integration (8 categories)
- Securing Block Ciphers against SCA and SIFA (8 categories)
- Indoor Smart Tracking of Hospital instrumentation (8 categories)
- Time Synchronization for 3G Mobile Communications (8 categories)
- A mmWave Voltage-Controlled-Oscillator (VCO) for beyond 5G applications (8 categories)
- Zero Power Touch Sensor and Reciever For Body Communication (8 categories)
- PULP-Shield for Autonomous UAV (8 categories)
- Pressure and acoustic Smart Sensors Network for Wind Turbines Monitoring (8 categories)
- LightProbe - Implementation of compressed-sensing algorithms (8 categories)
- Bringing XNOR-nets (ConvNets) to Silicon (8 categories)
- Compression of iEEG Data (8 categories)
- Runtime partitioning of L1 memory in Mempool (M) (8 categories)
- Improved Reacquisition for the 5G Cellular IoT (8 categories)
- System Emulation for AR and VR devices (8 categories)
- Vector Processor for In-Memory Computing (8 categories)
- Ibex: Bit-Manipulation Extension (7 categories)
- Self-Learning Drones based on Neural Networks (7 categories)
- Design of Scalable Event-driven Neural-Recording Digital Interface (7 categories)
- ASIC Implementation of High-Throughput Next Generation Turbo Decoders (7 categories)
- Time and Frequency Synchronization in LTE Cat-0 Devices (7 categories)
- Embedded Audio Source Localization Exploiting Coincidence Detection in Asynchronous Spike Streams (7 categories)
- High-Throughput Authenticated Encryption Architectures based on Block Ciphers (7 categories)
- Interference Cancellation for EC-GSM-IoT (7 categories)
- Design of a Prototype Chip with Interleaved Memory and Network-on-Chip (7 categories)
- LightProbe - Thermal-Power aware on-head Beamforming (7 categories)
- Towards The Integration of E-skin into Prosthetic Devices (7 categories)
- Design of low mismatch DAC used for VAD (7 categories)
- Low-power Temperature-insensitive Timer (7 categories)
- Efficient Implementation of an Active-Set QP Solver for FPGAs (7 categories)
- Turbo Equalization for Cellular IoT (7 categories)
- Virtual Memory Ara (7 categories)
- Optimal routing for 2D Mesh-based Analog Compute-In-Memory Accelerator Architecture (IBM-Zurich) (7 categories)
- Implementation of an AES Hardware Processing Engine (B/S) (7 categories)
- SHAre - An application Specific Instruction Set Processor for SHA-2/3 (7 categories)
- Visualization of Neural Architecture Search Spaces (7 categories)
- Exploring schedules for incremental and annealing quantization algorithms (7 categories)
- Efficient Digital Signal Processing in High-Channel-Count High-Frame-Rate 3D Ultrasound Imaging Systems (7 categories)
- Designing a Fault-Tolerant On-Chip Interconnect (1-2S/M) (7 categories)
- 3D Turbo Decoder ASIC Realization (7 categories)
- Design of Time-Encoded Spiking Neural Networks (IBM-Zurich) (7 categories)
- Energy-Efficient Brain-Inspired Hyperdimensional Computing (7 categories)
- Network-off-Chip (M) (7 categories)
- Audio Visual Speech Recognition (1S/1M) (7 categories)
- GDBTrace: A Post-Simulation Trace-Based RISC-V GDB Debugging Server (1S) (7 categories)
- Combining Multi Sensor Imaging and Machine Learning for Robust Far-Field Vision (7 categories)
- Implementation of the RISC-V Bit Manipulation (RVB) extensions for our RI5CY core (7 categories)
- A RISC-V ISA Extension for Pseudo Dual-Issue Monte Carlo in Snitch (1M/2S) (7 categories)
- Next Generation Channel Decoder (7 categories)
- Low Power Geolocalization And Indoor Localization (7 categories)
- An Industrial-grade Bluetooth LE Mesh Network Solution (7 categories)
- Channel Estimation for TD-HSPA (7 categories)
- Real-Time Stereo to Multiview Conversion (7 categories)
- Development of an implantable Force sensor for orthopedic applications (7 categories)
- Energy-Efficient Edge-Pursuit comparator for ultra-low power ADC (7 categories)
- Network-on-Chip for coherent and non-coherent traffic (M) (7 categories)
- Audio Visual Speech Separation (1S/1M) (7 categories)
- Combining Spiking Neural Networks with Hyperdimensional Computing for Autonomous Navigation (7 categories)
- Resource-Constrained Few-Shot Learning for Keyword Spotting (1S) (7 categories)
- Linux Driver for fine-grain and low overhead access to on-chip performance counters (7 categories)
- A RISC-V ISA Extension for Scalar Chaining in Snitch (M) (7 categories)
- EvaLTE: A 2G/3G/4G Cellular Transceiver FMC (7 categories)
- VLSI Implementation of a Low-Complexity Channel Shortener for 2G EC-GSM-IoT and Evolved EDGE (7 categories)
- Low Power Neural Network For Multi Sensors Wearable Devices (7 categories)
- Evolved EDGE Physical Layer Incremental Redundancy Architecture (7 categories)
- Wake Up Radio For Energy Efficient Communication System and IC Design (7 categories)
- Serverless Benchmarks on RISC-V (M) (7 categories)
- Towards Autonomous Navigation for Nano-Blimps (7 categories)
- Energy-efficient Circuits for Fully Wireless Brain-machine Interfaces (7 categories)
- Neural Architecture Search using Reinforcement Learning and Search Space Reduction (7 categories)
- Audio Visual Speech Separation and Recognition (1S/1M) (7 categories)
- Implementing A Low-Power Sensor Node Network (7 categories)
- Fast Wakeup From Deep Sleep State (7 categories)
- Radio Signal Direction Detection For Smart Glasses For Augmented Reality Applications (7 categories)
- Convolution Neural Networks on our Ultra-Low Power Mult-Core Plattform PULP (7 categories)
- Low Power One bit Microphone for Acoustic Imaging Using A Parallel Processor (7 categories)
- A Recurrent Neural Network Speech Recognition Chip (7 categories)
- Evaluating An Ultra low Power Vision Node (7 categories)
- Hardware/software co-programming on the Parallella platform (7 categories)
- An Ultra-Low-Power Neuromorphic Spiking Neuron Design (7 categories)
- Benchmarking RISC-V-based Accelerator Cards for Inference (multiple SA) (7 categories)
- Bluetooth Low Energy network with optimized data throughput (7 categories)
- Putting Together What Fits Together - GrÆStl (7 categories)
- Rethinking our Convolutional Network Accelerator Architecture (7 categories)
- Covariant Feature Detector on Parallel Ultra Low Power Architecture (7 categories)
- Scan Chain Fault Injection in a PULP SoC (1S) (7 categories)
- Realtime Gaze Tracking on Siracusa (7 categories)
- Implementation of a Coherent Application-Class Multicore System (1-2S) (7 categories)
- A FPGA-based data streaming system that enables real-time monitoring of cell culture and neuroactivities (7 categories)
- MatPHY: An Open-Source Physical Layer Development Framework (7 categories)
- Energy Efficient Serial Link (7 categories)
- Quantum Key Secured 100 Gbit/s Payload Encryption and its High-Speed Network Interfaces (7 categories)
- Modeling High Bandwidth Memory for Rapid Design Space Exploration (1-3S/B) (7 categories)
- Bandwidth Efficient NEureka (7 categories)
- Ara: Update PULP's Vector Processor with the recent RISC-V Vector Extension Development (7 categories)
- Study and Development of Intelligent Capability for Small-Size UAVs (7 categories)
- Towards Self-Sustainable Unmanned Aerial Vehicles (7 categories)
- Autonomous Mapping with Nano-Drones UWB and Novel Depth Sensors (7 categories)
- Design and Evaluation of a Small Size Avalanche Beacon (7 categories)
- Feature Extraction for Speech Recognition (1S) (7 categories)
- Design of Power-Noise-Efficient Discrete-Time Amplifier Using Open-Source Tools (7 categories)
- Learning Image Compression with Convolutional Networks (7 categories)
- Implementation of a NB-IoT Positioning System (7 categories)
- Interfacing PULP with a Brain-Inspired Ultra-Low Power Spiking Cochlea (7 categories)
- Digital Beamforming for Ultrasound Imaging (7 categories)
- Autonomous Obstacle Avoidance with Nano-Drones and Novel Depth Sensors (7 categories)
- A Unified-Multiplier Based Hardware Architecture for Elliptic Curve Cryptography (7 categories)
- Feature Extraction with Binarized Descriptors: ASIC Implementation and FPGA Environment (6 categories)
- Real-Time Implementation of Quantum State Identification using an FPGA (6 categories)
- Inductive Charging Circuit for Implantable Devices (6 categories)
- Nanoelectrode array biosensors - programmable non-overlapping clocks generator project (6 categories)
- OTDOA Positioning for LTE Cat-M (6 categories)
- Configurable Ultra Low Power LDO (6 categories)
- Channel Estimation and Equalization for LTE Advanced (6 categories)
- Design of State Retentive Flip-Flops (6 categories)
- Development of a Rockfall Sensor Node (6 categories)
- Ultrafast Medical Ultrasound imaging on a GPU (6 categories)
- Exploring features and algorithms for ultra-low-power closed-loop systems for epilepsy control (6 categories)
- Probabilistic training algorithms for quantized neural networks (6 categories)
- Interference Cancellation for Evolved EDGE on the RazorEDGE baseband ASIC (6 categories)
- A Novel Constrained-Viterbi Algorithm with Linear Equalization and Grouping Assistance (6 categories)
- Advanced Data Movers for Modern Neural Networks (6 categories)
- Passive and Self Sustaining Receivers For On and Intra Body Communication For Wearable Sensors Networks (6 categories)
- Huawei Research (6 categories)
- Taimir Aguacil (6 categories)
- Wireless Biomedical Signal Acquisition Device (6 categories)
- Real-Time Optical Flow Using Neural Networks (6 categories)
- Infrared Wake Up Radio (6 categories)
- Development of a syringe label reader for the neurocritical care unit (6 categories)
- Near-Optimal Reduced-Complexity Sequence Detectors for TD-HSPA (6 categories)
- Freedom from Interference in Heterogeneous COTS SoCs (6 categories)
- High-speed Scene Labeling on FPGA (6 categories)
- VLSI Implementation Polar Decoder using High Level Synthesis (6 categories)
- Next-Gen Ultrasound Imaging Systems (Industry Student Projects & PhD Opportunity) (6 categories)
- RISC-V based Implementation of Secure Ranging According to IEEE 802.15.4z UWB (6 categories)
- Human Intranet (6 categories)
- Improving Resiliency of Hyperdimensional Computing (6 categories)
- Karim Badawi (6 categories)
- Ultra-High-Efficiency Power Supply Management for Ultra-Low-Power Systems on Chip (6 categories)
- Real-Time Pedestrian Detection For Privacy Enhancement (6 categories)
- Toward Superposition of Brain-Computer Interface Models (6 categories)
- FFT-based Convolutional Network Accelerator (6 categories)
- Design of a VLIW processor architecture based on RISC-V (6 categories)
- Successive Interference Cancellation for 3G Downlink (6 categories)
- Linux Driver for built-in ADC using DMA and Programmable Real-Time Unit (PRU) support on Beaglebone Black used as embedded HPC-performance-monitoring device (6 categories)
- Improving Scene Labeling with Hyperspectral Data (6 categories)
- Design of a 25 Gbps SerDes for optical chip-to-chip communication (6 categories)
- LightProbe (6 categories)
- Toward hyperdimensional active perception: learning compressed sensorimotor control by demonstration (6 categories)
- Internet of Things SoC Characterization (6 categories)
- Minimal Cost RISC-V core (6 categories)
- Hyper-Dimensional Computing Based Predictive Maintenance (6 categories)
- Control an external ADC using Programmable Real-Time Unit (PRU) Subsystem on Beaglebone Black used as embedded HPC-performance-monitoring device (6 categories)
- Satellite Internet of Things (6 categories)
- Image and Video Processing (6 categories)
- High Performance Digitally-Assisted Time Domain ADC Design for DPLL used in Cellular IOT (6 categories)
- On-chip clock synthesizer design and porting (6 categories)
- LAPACK/BLAS for FPGA (6 categories)
- Ultra-low power transceiver for implantable devices (6 categories)
- Birds Long Term Monitoring With Ultra Low Power Wireless Sensor Node (6 categories)
- High Power Efficient Digitally Controlled Oscillator Design for Cellular IOT (6 categories)
- Design of an LTE Module for the Internet of Things (6 categories)
- Variability Tolerant Ultra Low Power Cluster (6 categories)
- Non-binary LDPC Decoder for Deep-Space Optical Communications (6 categories)
- AMZ Driverless Competition Embedded Systems Projects (6 categories)
- Neural Networks Framwork for Embedded Plattforms (6 categories)
- FPGA-based Testbed Implementation of an Extended-Coverage Point-to-Point Communication Link for the Internet of Things (6 categories)
- Compressed Sensing for Wireless Biosignal Monitoring (6 categories)
- Variable Bit Precision Logic for Deep Learning and Artificial Intelligence (6 categories)
- Online Learning of User Features (1S) (6 categories)
- Cell Measurements for the 5G Internet of Things (6 categories)
- IBM Research (6 categories)
- PREM on PULP (6 categories)
- Charging System for Implantable Electronics (6 categories)
- Signal-Processing and Data-Compression on Beaglebone Black used as embedded HPC-performance-monitoring device (6 categories)
- Design of a Fused Multiply Add Floating Point Unit (6 categories)
- LightProbe - Design of a High-Speed Optical Link (6 categories)
- Digital Audio Interface for Smart Intensive Computing Triggering (6 categories)
- High Throughput Turbo Decoder Design (6 categories)
- Compressed Sensing vs JPEG (6 categories)
- Implementing Hibernation on the ARM Cortex M0 (6 categories)
- Hardware Accelerated Derivative Pricing (6 categories)
- LTE IoT Network Synchronization (6 categories)
- Developing a small portable neutron detector for detecting smuggled nuclear material (6 categories)
- Ultra Low Power Conversion Circuit For Batteryless Applications (6 categories)
- Exploring Algorithms for Early Seizure Detection (6 categories)
- Flexible Front-End Circuit for Biomedical Data Acquisition (6 categories)
- Intelligent Power Management Unit (iPMU) (6 categories)
- Evaluating memory access pattern specializations in OoO, server-grade cores (M) (6 categories)
- Change-based Evaluation of Convolutional Neural Networks (6 categories)
- David J. Mack (6 categories)
- High performance continuous-time Delta-Sigma ADC for magnetic resonance imaging (6 categories)
- Low-power Clock Generation Solutions for 65nm Technology (6 categories)
- Evaluating the RiscV Architecture (6 categories)
- Hardware Accelerator for Model Predictive Controller (5 categories)
- Channel Decoding for TD-HSPA (5 categories)
- Exploring feature selection and classification algorithms for ultra-low-power closed-loop systems for epilepsy control (5 categories)
- Benjamin Weber (5 categories)
- Classification of Evoked Local-Field Potentials in Rat Barrel Cortex using Hyper-dimensional Computing (5 categories)
- Mauro Salomon (5 categories)
- Design and Implementation of Digital Spiking Neurons for Ultra-Low-Power In-Cluster Coprocessors (5 categories)
- Analysis and Design of Power Efficient RF/ mm-Wave LC-tank Oscillator in 28nm for 5G communication applications (5 categories)
- Audio DAC Conversion Jitter Measurement System (5 categories)
- Single-Bit-Synapse Spiking Neural System-on-Chip (5 categories)
- LightProbe - Ultracompact Power Supply PCB (5 categories)
- Design and Implementation of a Convolutional Neural Network Accelerator ASIC (5 categories)
- Soft-Output Viterbi Equalizer as part of Evolved EDGE baseband ASIC (5 categories)
- Ultra-Efficient Visual Classification on Movidius Myriad2 (5 categories)
- An FPGA-Based Evaluation Platform for Mobile Communications (5 categories)
- Bateryless Heart Rate Monitoring (5 categories)
- State-Saving @ NXP (5 categories)
- Stefan Lippuner (5 categories)
- Autonomous Smart Watches: Hardware and Software Desing (5 categories)
- Hybrid Analog/Digital Leveling Loop for Very-Low-Distortion Oscillator (5 categories)
- Sandro Belfanti (5 categories)
- 3D Ultrasound Bubble Tracking (5 categories)
- A Wearable System for long term monitoring of human physiological parameters with E skin sensors (5 categories)
- Ultra-low power processor design (5 categories)
- Every individual on the planet should have a real chance to obtain personalized medical therapy (5 categories)
- Hardware Support for IDE in Multicore Environment (5 categories)
- Sensor Fusion for Rockfall Sensor Node (5 categories)
- Ultrasound High Speed Microbubble Tracking (5 categories)
- High Performance Cellular Receivers in Very Advanced CMOS (5 categories)
- Autonomous Smart Watches: Toward an ultra low power microphone detector with events classification (5 categories)
- CMOS power amplifier for field measurements in MRI systems (5 categories)
- Design and Implementation of ultra low power vision system (5 categories)
- Ternary Weights Engine For Efficient Many Channels Spike Sorting Applications (5 categories)
- Ultra-low power sampling front-end for acquisition of physiological signals (5 categories)
- Characterization of the susceptibility to cosmic radiation of wide bandgap power devices by radioactive sources and at cryogenic temperatures (5 categories)
- Switched-capacitor power amplifier for IoT mobile communications: design of signal processing path (5 categories)
- Noise Figure Measurement for Cryogenic System (5 categories)
- Harald Kröll (5 categories)
- CPS Software-Configurable State-Machine (5 categories)
- Hyper Meccano: Acceleration of Hyperdimensional Computing (5 categories)
- Desing and Implementation Of Long Lasting Key Finder With Bleetooth Low Energy (5 categories)
- 5G Cellular RF Front-end Design in 22nm CMOS Technology (5 categories)
- Experimental Validation of Impact Ionization Models for TCAD Simulation by a Novel Characterization Technique (5 categories)
- An Ultra-Compact High-Power CMOS Power Amplifier for Millimeter-Wave 5G Communications (5 categories)
- Application Specific Frequency Synthesizers (Analog/Digital PLLs) (5 categories)
- Pulse Oximetry Fachpraktikum (5 categories)
- Switched Capacitor Based Bandgap-Reference (5 categories)
- Improving our Smart Camera System (5 categories)
- Design and implementation of the front-end for a portable ionizing radiation detector (5 categories)
- PREM Runtime Scheduling Policies (5 categories)
- Design of a Digital Audio Module for Ultra-Low Power Cellular Applications (5 categories)
- DigitalUltrasoundHead (5 categories)
- High Speed FPGA Trigger Logic for Particle Physics Experiments (5 categories)
- Design of an on-field adaptable pulse-processing unit for semicondutor radiation detectors (5 categories)
- Design of Charge-Pump PLL in 22nm for 5G communication applications (5 categories)
- LTE-Advanced RF Front-end Design in 28nm CMOS Technology (5 categories)
- A Wireless Sensor Network for a Smart LED Lighting control (5 categories)
- Multiuser Equalization and Detection for 3GPP TD-SCDMA (5 categories)
- High-Resolution Large-Bandwidth Delta-Sigma A/D Converters in Ultra-Scaled CMOS (5 categories)
- Towards Online Training of CNNs: Hebbian-Based Deep Learning (5 categories)
- Scattering Networks for Scene Labeling (5 categories)
- Design of MEMs Sensor Interface (5 categories)
- Ambient RF Energy harvesting for Wireless Sensor Network (5 categories)
- Ultra Low Power Wake Up Radio for Wireless Sensor Network (5 categories)
- Signal to Noise Ratio Estimation for 3G standards (5 categories)
- Sub-Noise Floor Channel Tracking (5 categories)
- Towards Self Sustainable UAVs (5 categories)
- Matthias Korb (5 categories)
- FPGA Testbed Implementation for Bluetooth Indoor Positioning (5 categories)
- Design and Exploitation of a Test-Bench for Non-Destructive Characterization of the Susceptibility of Silicon Carbide (SiC) Power Devices to Cosmic Radiation (5 categories)
- Turbo Decoder Design for High Code Rates (5 categories)
- Reconfigurable Fully-Unrolled 2D-FFT Core Generator for Multi-Antenna mmWave Communication (4 categories)
- Simulation of 2D artificial cilia metasurface in COMSOL (4 categories)
- High resolution, low power Sigma Delta ADC (4 categories)
- Jammer-Resilient Synchronization for Wireless Communications (4 categories)
- Molecular Binding Kinetics Modelling of NO2 on Graphene/hBN Heterostructure (4 categories)
- Influence of the Initial Filament Geometry on the Forming Step in CBRAM. (4 categories)
- ASIC Implementation of Jammer Mitigation (4 categories)
- Nanoscale Hybrid III-V Plasmonic Laser for Low-Power Photonic ICs (4 categories)
- Jammer Mitigation Meets Machine Learning (4 categories)
- Design space exploration of InP Heterojunction Bipolar Transistors (DHBTs) (4 categories)
- Design of Streaming Data Platform for High-Speed ADC Data (4 categories)
- ASIC Implementation of a Low-Power mmWave Massive MIMO Equalizer with a Custom Number Format (4 categories)
- Tiny CNNs for Ultra-Efficient Object Detection on PULP (4 categories)
- Semi-Custom Digital VLSI for Processing-in-Memory (4 categories)
- Integrated silicon photonic structures-Lumiphase (4 categories)
- Development of an efficient algorithm for quantum transport codes (4 categories)
- ASIC implementation of a beamspace massive MIMO-OFDM detector for 5G/6G (4 categories)
- Processing of 3D Micro-tomography data for Lithium Ion Batteries (4 categories)
- Kinetic Energy Harvesting For Autonomous Smart Watches (4 categories)
- Multi-Band Receiver Design for LTE Mobile Communication (4 categories)
- Beamspace processing for 5G mmWave massive MIMO on GPU (4 categories)
- ASIC implementation of an interpolation-based wideband massive MIMO detector (4 categories)
- Biomedical Circuits, Systems, and Applications (4 categories)
- Super Resolution Radar/Imaging at mm-Wave frequencies (4 categories)
- Phase-change memory devices for emerging computing paradigms (4 categories)
- VLSI Implementation of a Systolic Array for LMMSE Detection in mmWave Massive MIMO-OFDM (4 categories)
- Finite element modeling of electrochemical random access memory (4 categories)
- Characterization techniques for silicon photonics-Lumiphase (4 categories)
- Implementation of Computationally Efficient Scattering Mechanisms for Periodic Devices and 2D Materials (4 categories)
- Design of a D-Band Variable Gain Amplifier for 6G Communication (4 categories)
- Compressed Sensing Reconstruction on FPGA (4 categories)
- Investigation of Metal Diffusion in Oxides for CBRAM Applications (4 categories)
- Fast and Accurate Multiclass Inference for Brain–Computer Interfaces (4 categories)
- Cell-Free mmWave Massive MIMO Communication (4 categories)
- Developing High Efficiency Batteries for Electric Cars (4 categories)
- Exploitation of Inherent Error Resilience of Wireless Systems under Unreliable Silicon (4 categories)
- High-Resolution, Calibrated Folding ADCs (4 categories)
- Charge and heat transport through graphene nanoribbon based devices (4 categories)
- Energy Efficient Autonomous UAVs (4 categories)
- Glitches Reduce Listening Time of Your iPod (4 categories)
- Aliasing-Free Wavetable Music Synthesizer (4 categories)
- ASIC Design of a Gaussian Message Passing Processor (4 categories)
- Ultra Low-Power Oscillator (4 categories)
- Weak-strong massive MIMO communication with low-resolution ADCs (4 categories)
- FPGA Optimizations of Dense Binary Hyperdimensional Computing (4 categories)
- Investigation of Redox Processes in CBRAM (4 categories)
- ASIC Design of a Sigma Point Processor (4 categories)
- Electrically verifying a CMOS Multi-Modal Electrochemical, Impedance, and Optical Cellular Sensing Array for Massively Paralleled Exoelectrogen Screening (4 categories)
- A computational memory unit using phase-change memory devices (4 categories)
- NORX - an AEAD algorithm for the CAESAR competition (4 categories)
- Receiver design for the DigRF 4G high speed serial link (4 categories)
- Data Mapping for Unreliable Memories (4 categories)
- Neural Recording Interface and Spike Sorting Algorithm (4 categories)
- Quantum Transport Modeling of Interband Cascade Lasers (ICL) (4 categories)
- High performance continous-time Delta-Sigma ADC for biomedical applications (4 categories)
- Efficient Banded Matrix Multiplication for Quantum Transport Simulations (4 categories)
- Electrothermal characterization of van der Waals Heterostructures with a partial overlap (4 categories)
- Novel Methods for Jammer Mitigation (4 categories)
- Quantum transport in 2D heterostructures (4 categories)
- Stand-Alone Edge Computing with GAP8 (3 categories)
- Machine Learning Assisted Direct Synthesis of Passive Networks (3 categories)
- Assessment of novel photovoltaic architectures by circuit simulation (3 categories)
- Forward error-correction ASIC using GRAND (3 categories)
- Passive Radar for UAV Detection using Machine Learning (3 categories)
- Wiederverwendung (reuse) ganzer Funktionsblöcke beim VLSI-Entwurf (3 categories)
- Pirmin Vogel (3 categories)
- Self-Supervised User Positioning in Cell-Free Massive MIMO Systems (3 categories)
- Accelerating Applications Relying on Matrix-Vector-Product-Like Operations (3 categories)
- Frank K. Gürkaynak (3 categories)
- VLSI Design of an Asynchronous LDPC Decoder (3 categories)
- Low-power time synchronization for IoT applications (3 categories)
- Analysis of Low-Power Wide Area Network Technologies for the Internet of Things (3 categories)
- Ferroelectric Memristors for Artificial Neural Networks (IBM-Zurich) (3 categories)
- Audio Video Preprocessing In Parallel Ultra Low Power Platform (3 categories)
- Fabian Schuiki (3 categories)
- Autonomous Smart Sensors for IoT (3 categories)
- Peak-to-average power Reduction (3 categories)
- Moritz Schneider (3 categories)
- Power Optimization in Multipliers (3 categories)
